scsi: g_NCR5380: Two DTC436 PDMA workarounds
Limit PDMA send to 512 B to avoid data corruption on DTC3181E. The corruption is always the same: one byte missing at the beginning of a 128 B block. It happens only with slow Quantum LPS 240 drive, not with faster IBM DORS-32160. It's not clear what causes this. Documentation for the DTC436 chip has not been made available. Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Tested-by: Ondrej Zary <linux@rainbow-software.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -45,7 +45,8 @@
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int c400_blk_cnt; \
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int c400_host_buf; \
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int io_width; \
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int pdma_residual
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int pdma_residual; \
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int board
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#define NCR5380_dma_xfer_len generic_NCR5380_dma_xfer_len
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#define NCR5380_dma_recv_setup generic_NCR5380_precv
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@ -316,6 +317,7 @@ static int generic_NCR5380_init_one(struct scsi_host_template *tpnt,
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}
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hostdata = shost_priv(instance);
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hostdata->board = board;
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hostdata->io = iomem;
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hostdata->region_size = region_size;
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@ -492,6 +494,8 @@ static void wait_for_53c80_access(struct NCR5380_hostdata *hostdata)
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int count = 10000;
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do {
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if (hostdata->board == BOARD_DTC3181E)
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udelay(4); /* DTC436 chip hangs without this */
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if (NCR5380_read(hostdata->c400_ctl_status) & CSR_53C80_REG)
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return;
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} while (--count > 0);
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@ -665,7 +669,12 @@ static int generic_NCR5380_dma_xfer_len(struct NCR5380_hostdata *hostdata,
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/* 53C400 datasheet: non-modulo-128-byte transfers should use PIO */
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if (transfersize % 128)
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transfersize = 0;
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return 0;
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/* Limit PDMA send to 512 B to avoid random corruption on DTC3181E */
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if (hostdata->board == BOARD_DTC3181E &&
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cmd->sc_data_direction == DMA_TO_DEVICE)
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transfersize = min(cmd->SCp.this_residual, 512);
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return min(transfersize, DMA_MAX_SIZE);
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}
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