ptp: clockmatrix: remove 5 second delay before entering write phase mode
Remove write phase mode 5 second setup delay, not needed. Signed-off-by: Min Li <min.li.xe@renesas.com> Link: https://lore.kernel.org/r/1607442117-13661-2-git-send-email-min.li.xe@renesas.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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@ -70,16 +70,6 @@ static int contains_full_configuration(const struct firmware *fw)
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return (count >= full_count);
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}
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static long set_write_phase_ready(struct ptp_clock_info *ptp)
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{
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struct idtcm_channel *channel =
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container_of(ptp, struct idtcm_channel, caps);
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channel->write_phase_ready = 1;
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return 0;
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}
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static int char_array_to_timespec(u8 *buf,
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u8 count,
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struct timespec64 *ts)
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@ -1339,16 +1329,8 @@ static int _idtcm_adjphase(struct idtcm_channel *channel, s32 delta_ns)
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if (err)
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return err;
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channel->write_phase_ready = 0;
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ptp_schedule_worker(channel->ptp_clock,
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msecs_to_jiffies(WR_PHASE_SETUP_MS));
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}
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if (!channel->write_phase_ready)
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delta_ns = 0;
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offset_ps = (s64)delta_ns * 1000;
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/*
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@ -1928,7 +1910,6 @@ static const struct ptp_clock_info idtcm_caps_v487 = {
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.gettime64 = &idtcm_gettime,
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.settime64 = &idtcm_settime_v487,
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.enable = &idtcm_enable,
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.do_aux_work = &set_write_phase_ready,
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};
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static const struct ptp_clock_info idtcm_caps = {
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@ -1941,7 +1922,6 @@ static const struct ptp_clock_info idtcm_caps = {
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.gettime64 = &idtcm_gettime,
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.settime64 = &idtcm_settime,
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.enable = &idtcm_enable,
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.do_aux_work = &set_write_phase_ready,
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};
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static int configure_channel_pll(struct idtcm_channel *channel)
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@ -2111,8 +2091,6 @@ static int idtcm_enable_channel(struct idtcm *idtcm, u32 index)
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if (!channel->ptp_clock)
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return -ENOTSUPP;
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channel->write_phase_ready = 0;
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dev_info(&idtcm->client->dev, "PLL%d registered as ptp%d\n",
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index, channel->ptp_clock->index);
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@ -125,7 +125,6 @@ struct idtcm_channel {
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enum pll_mode pll_mode;
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u8 pll;
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u16 output_mask;
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int write_phase_ready;
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};
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struct idtcm {
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