clocksource: time-armada-370-xp: add suspend/resume support
This commit adds a set of suspend/resume syscore_ops to respectively save and restore a number of timer registers, in order to make sure the clockevent and clocksource devices continue to work properly across a suspend/resume cycle. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: linux-kernel@vger.kernel.org Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lkml.kernel.org/r/1416585613-2113-5-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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@ -43,6 +43,7 @@
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#include <linux/module.h>
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#include <linux/sched_clock.h>
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#include <linux/percpu.h>
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#include <linux/syscore_ops.h>
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/*
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* Timer block registers.
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@ -223,6 +224,28 @@ static struct notifier_block armada_370_xp_timer_cpu_nb = {
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.notifier_call = armada_370_xp_timer_cpu_notify,
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};
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static u32 timer0_ctrl_reg, timer0_local_ctrl_reg;
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static int armada_370_xp_timer_suspend(void)
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{
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timer0_ctrl_reg = readl(timer_base + TIMER_CTRL_OFF);
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timer0_local_ctrl_reg = readl(local_base + TIMER_CTRL_OFF);
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return 0;
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}
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static void armada_370_xp_timer_resume(void)
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{
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writel(0xffffffff, timer_base + TIMER0_VAL_OFF);
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writel(0xffffffff, timer_base + TIMER0_RELOAD_OFF);
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writel(timer0_ctrl_reg, timer_base + TIMER_CTRL_OFF);
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writel(timer0_local_ctrl_reg, local_base + TIMER_CTRL_OFF);
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}
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struct syscore_ops armada_370_xp_timer_syscore_ops = {
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.suspend = armada_370_xp_timer_suspend,
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.resume = armada_370_xp_timer_resume,
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};
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static void __init armada_370_xp_timer_common_init(struct device_node *np)
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{
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u32 clr = 0, set = 0;
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@ -285,6 +308,8 @@ static void __init armada_370_xp_timer_common_init(struct device_node *np)
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/* Immediately configure the timer on the boot CPU */
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if (!res)
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armada_370_xp_timer_setup(this_cpu_ptr(armada_370_xp_evt));
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register_syscore_ops(&armada_370_xp_timer_syscore_ops);
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}
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static void __init armada_xp_timer_init(struct device_node *np)
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