sparc64: Fix OOPS in psycho_pcierr_intr_other().
We no longer put the top-level PCI controller device into the PCI layer device list. So pbm->pci_bus->self is always NULL. Therefore, use direct PCI config space accesses to get at the PCI controller's PCI_STATUS register. Tested by Meelis Roos. Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -575,7 +575,7 @@ static irqreturn_t psycho_pcierr_intr_other(struct pci_pbm_info *pbm, int is_pbm
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{
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unsigned long csr_reg, csr, csr_error_bits;
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irqreturn_t ret = IRQ_NONE;
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u16 stat;
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u16 stat, *addr;
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if (is_pbm_a) {
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csr_reg = pbm->controller_regs + PSYCHO_PCIA_CTRL;
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@ -597,7 +597,9 @@ static irqreturn_t psycho_pcierr_intr_other(struct pci_pbm_info *pbm, int is_pbm
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printk("%s: PCI SERR signal asserted.\n", pbm->name);
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ret = IRQ_HANDLED;
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}
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pci_read_config_word(pbm->pci_bus->self, PCI_STATUS, &stat);
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addr = psycho_pci_config_mkaddr(pbm, pbm->pci_first_busno,
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0, PCI_STATUS);
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pci_config_read16(addr, &stat);
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if (stat & (PCI_STATUS_PARITY |
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PCI_STATUS_SIG_TARGET_ABORT |
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PCI_STATUS_REC_TARGET_ABORT |
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@ -605,7 +607,7 @@ static irqreturn_t psycho_pcierr_intr_other(struct pci_pbm_info *pbm, int is_pbm
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PCI_STATUS_SIG_SYSTEM_ERROR)) {
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printk("%s: PCI bus error, PCI_STATUS[%04x]\n",
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pbm->name, stat);
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pci_write_config_word(pbm->pci_bus->self, PCI_STATUS, 0xffff);
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pci_config_write16(addr, 0xffff);
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ret = IRQ_HANDLED;
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}
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return ret;
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