iwlegacy: Use standard #defines for PCIe Capability ASPM fields
Use the standard #defines rather than creating local definitions for PCIe Capability ASPM fields. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Stanislaw Gruszka <sgruszka@redhat.com>
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@ -917,10 +917,6 @@ struct il4965_scd_bc_tbl {
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/* PCI registers */
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#define PCI_CFG_RETRY_TIMEOUT 0x041
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/* PCI register values */
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#define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01
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#define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02
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#define IL4965_DEFAULT_TX_RETRY 15
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/* EEPROM */
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@ -1186,7 +1186,7 @@ il_power_initialize(struct il_priv *il)
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u16 lctl;
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pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl);
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il->power_data.pci_pm = !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN);
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il->power_data.pci_pm = !(lctl & PCI_EXP_LNKCTL_ASPM_L0S);
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il->power_data.debug_sleep_level_override = -1;
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@ -4235,8 +4235,7 @@ il_apm_init(struct il_priv *il)
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*/
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if (il->cfg->set_l0s) {
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pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl);
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if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
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PCI_CFG_LINK_CTRL_VAL_L1_EN) {
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if (lctl & PCI_EXP_LNKCTL_ASPM_L1) {
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/* L1-ASPM enabled; disable(!) L0S */
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il_set_bit(il, CSR_GIO_REG,
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CSR_GIO_REG_VAL_L0S_ENABLED);
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@ -2426,10 +2426,6 @@ struct il_tfd {
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/* PCI registers */
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#define PCI_CFG_RETRY_TIMEOUT 0x041
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/* PCI register values */
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#define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01
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#define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02
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struct il_rate_info {
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u8 plcp; /* uCode API: RATE_6M_PLCP, etc. */
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u8 plcp_siso; /* uCode API: RATE_SISO_6M_PLCP, etc. */
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