drm/amdgpu: disable mec2 fw bin loading
disable mec2 fw bin loading and reference on unsupported ASIC Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: John Clements <john.clements@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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211fe484a6
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f8f70c1371
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@ -107,14 +107,12 @@ MODULE_FIRMWARE("amdgpu/raven2_rlc.bin");
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MODULE_FIRMWARE("amdgpu/raven_kicker_rlc.bin");
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MODULE_FIRMWARE("amdgpu/arcturus_mec.bin");
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MODULE_FIRMWARE("amdgpu/arcturus_mec2.bin");
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MODULE_FIRMWARE("amdgpu/arcturus_rlc.bin");
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MODULE_FIRMWARE("amdgpu/renoir_ce.bin");
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MODULE_FIRMWARE("amdgpu/renoir_pfp.bin");
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MODULE_FIRMWARE("amdgpu/renoir_me.bin");
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MODULE_FIRMWARE("amdgpu/renoir_mec.bin");
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MODULE_FIRMWARE("amdgpu/renoir_mec2.bin");
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MODULE_FIRMWARE("amdgpu/renoir_rlc.bin");
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MODULE_FIRMWARE("amdgpu/green_sardine_ce.bin");
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@ -1517,6 +1515,15 @@ out:
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return err;
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}
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static bool gfx_v9_0_load_mec2_fw_bin_support(struct amdgpu_device *adev)
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{
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if (adev->asic_type == CHIP_ARCTURUS ||
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adev->asic_type == CHIP_RENOIR)
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return false;
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return true;
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}
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static int gfx_v9_0_init_cp_compute_microcode(struct amdgpu_device *adev,
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const char *chip_name)
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{
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@ -1538,21 +1545,23 @@ static int gfx_v9_0_init_cp_compute_microcode(struct amdgpu_device *adev,
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adev->gfx.mec_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);
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snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec2.bin", chip_name);
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err = request_firmware(&adev->gfx.mec2_fw, fw_name, adev->dev);
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if (!err) {
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err = amdgpu_ucode_validate(adev->gfx.mec2_fw);
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if (err)
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goto out;
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cp_hdr = (const struct gfx_firmware_header_v1_0 *)
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adev->gfx.mec2_fw->data;
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adev->gfx.mec2_fw_version =
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le32_to_cpu(cp_hdr->header.ucode_version);
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adev->gfx.mec2_feature_version =
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le32_to_cpu(cp_hdr->ucode_feature_version);
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} else {
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err = 0;
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adev->gfx.mec2_fw = NULL;
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if (gfx_v9_0_load_mec2_fw_bin_support(adev)) {
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snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_mec2.bin", chip_name);
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err = request_firmware(&adev->gfx.mec2_fw, fw_name, adev->dev);
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if (!err) {
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err = amdgpu_ucode_validate(adev->gfx.mec2_fw);
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if (err)
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goto out;
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cp_hdr = (const struct gfx_firmware_header_v1_0 *)
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adev->gfx.mec2_fw->data;
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adev->gfx.mec2_fw_version =
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le32_to_cpu(cp_hdr->header.ucode_version);
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adev->gfx.mec2_feature_version =
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le32_to_cpu(cp_hdr->ucode_feature_version);
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} else {
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err = 0;
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adev->gfx.mec2_fw = NULL;
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}
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}
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if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
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@ -1581,8 +1590,7 @@ static int gfx_v9_0_init_cp_compute_microcode(struct amdgpu_device *adev,
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/* TODO: Determine if MEC2 JT FW loading can be removed
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for all GFX V9 asic and above */
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if (adev->asic_type != CHIP_ARCTURUS &&
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adev->asic_type != CHIP_RENOIR) {
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if (gfx_v9_0_load_mec2_fw_bin_support(adev)) {
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info = &adev->firmware.ucode[AMDGPU_UCODE_ID_CP_MEC2_JT];
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info->ucode_id = AMDGPU_UCODE_ID_CP_MEC2_JT;
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info->fw = adev->gfx.mec2_fw;
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