accel/qaic: Implement quirk for SOC_HW_VERSION
[ Upstream commit 4c8874c2a6512b9fe7285cab1a6910d9211a6cfb ]
The SOC_HW_VERSION register in the BHI space is not correctly initialized
by the device and in many cases contains uninitialized data. The register
could contain 0xFFFFFFFF which is a special value to indicate a link
error in PCIe, therefore if observed, we could incorrectly think the
device is down.
Intercept reads for this register, and provide the correct value - every
production instance would read 0x60110200 if the device was operating as
intended.
Fixes: a36bf7af86
("accel/qaic: Add MHI controller")
Signed-off-by: Jeffrey Hugo <quic_jhugo@quicinc.com>
Reviewed-by: Pranjal Ramajor Asha Kanojiya <quic_pkanojiy@quicinc.com>
Reviewed-by: Jacek Lawrynowicz <jacek.lawrynowicz@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231208163101.1295769-3-quic_jhugo@quicinc.com
Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -404,8 +404,21 @@ static struct mhi_controller_config aic100_config = {
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static int mhi_read_reg(struct mhi_controller *mhi_cntrl, void __iomem *addr, u32 *out)
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{
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u32 tmp = readl_relaxed(addr);
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u32 tmp;
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/*
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* SOC_HW_VERSION quirk
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* The SOC_HW_VERSION register (offset 0x224) is not reliable and
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* may contain uninitialized values, including 0xFFFFFFFF. This could
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* cause a false positive link down error. Instead, intercept any
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* reads and provide the correct value of the register.
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*/
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if (addr - mhi_cntrl->regs == 0x224) {
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*out = 0x60110200;
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return 0;
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}
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tmp = readl_relaxed(addr);
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if (tmp == U32_MAX)
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return -EIO;
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