MIPS: KVM: Add CP0_Count/Compare KVM register access
Implement KVM_{GET,SET}_ONE_REG ioctl based access to the guest CP0 Count and Compare registers. These registers are special in that writing to them has side effects (adjusting the time until the next timer interrupt) and reading of Count depends on the time. Therefore add a couple of callbacks so that different implementations (trap & emulate or VZ) can implement them differently depending on what the hardware provides. The trap & emulate versions mostly duplicate what happens when a T&E guest reads or writes these registers, so it inherits the same limitations which can be fixed in later patches. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Gleb Natapov <gleb@kernel.org> Cc: kvm@vger.kernel.org Cc: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: David Daney <david.daney@cavium.com> Cc: Sanjay Lal <sanjayl@kymasys.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -523,6 +523,10 @@ struct kvm_mips_callbacks {
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uint32_t cause);
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uint32_t cause);
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int (*irq_clear) (struct kvm_vcpu *vcpu, unsigned int priority,
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int (*irq_clear) (struct kvm_vcpu *vcpu, unsigned int priority,
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uint32_t cause);
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uint32_t cause);
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int (*get_one_reg)(struct kvm_vcpu *vcpu,
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const struct kvm_one_reg *reg, s64 *v);
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int (*set_one_reg)(struct kvm_vcpu *vcpu,
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const struct kvm_one_reg *reg, s64 v);
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};
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};
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extern struct kvm_mips_callbacks *kvm_mips_callbacks;
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extern struct kvm_mips_callbacks *kvm_mips_callbacks;
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int kvm_mips_emulation_init(struct kvm_mips_callbacks **install_callbacks);
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int kvm_mips_emulation_init(struct kvm_mips_callbacks **install_callbacks);
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@ -529,7 +529,9 @@ static u64 kvm_mips_get_one_regs[] = {
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KVM_REG_MIPS_CP0_PAGEMASK,
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KVM_REG_MIPS_CP0_PAGEMASK,
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KVM_REG_MIPS_CP0_WIRED,
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KVM_REG_MIPS_CP0_WIRED,
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KVM_REG_MIPS_CP0_BADVADDR,
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KVM_REG_MIPS_CP0_BADVADDR,
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KVM_REG_MIPS_CP0_COUNT,
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KVM_REG_MIPS_CP0_ENTRYHI,
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KVM_REG_MIPS_CP0_ENTRYHI,
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KVM_REG_MIPS_CP0_COMPARE,
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KVM_REG_MIPS_CP0_STATUS,
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KVM_REG_MIPS_CP0_STATUS,
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KVM_REG_MIPS_CP0_CAUSE,
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KVM_REG_MIPS_CP0_CAUSE,
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KVM_REG_MIPS_CP0_EPC,
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KVM_REG_MIPS_CP0_EPC,
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@ -545,6 +547,7 @@ static int kvm_mips_get_reg(struct kvm_vcpu *vcpu,
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const struct kvm_one_reg *reg)
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const struct kvm_one_reg *reg)
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{
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{
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struct mips_coproc *cop0 = vcpu->arch.cop0;
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struct mips_coproc *cop0 = vcpu->arch.cop0;
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int ret;
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s64 v;
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s64 v;
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switch (reg->id) {
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switch (reg->id) {
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@ -579,6 +582,9 @@ static int kvm_mips_get_reg(struct kvm_vcpu *vcpu,
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case KVM_REG_MIPS_CP0_ENTRYHI:
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case KVM_REG_MIPS_CP0_ENTRYHI:
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v = (long)kvm_read_c0_guest_entryhi(cop0);
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v = (long)kvm_read_c0_guest_entryhi(cop0);
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break;
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break;
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case KVM_REG_MIPS_CP0_COMPARE:
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v = (long)kvm_read_c0_guest_compare(cop0);
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break;
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case KVM_REG_MIPS_CP0_STATUS:
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case KVM_REG_MIPS_CP0_STATUS:
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v = (long)kvm_read_c0_guest_status(cop0);
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v = (long)kvm_read_c0_guest_status(cop0);
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break;
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break;
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@ -606,6 +612,12 @@ static int kvm_mips_get_reg(struct kvm_vcpu *vcpu,
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case KVM_REG_MIPS_CP0_CONFIG7:
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case KVM_REG_MIPS_CP0_CONFIG7:
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v = (long)kvm_read_c0_guest_config7(cop0);
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v = (long)kvm_read_c0_guest_config7(cop0);
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break;
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break;
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/* registers to be handled specially */
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case KVM_REG_MIPS_CP0_COUNT:
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ret = kvm_mips_callbacks->get_one_reg(vcpu, reg, &v);
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if (ret)
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return ret;
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break;
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default:
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default:
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -690,6 +702,10 @@ static int kvm_mips_set_reg(struct kvm_vcpu *vcpu,
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case KVM_REG_MIPS_CP0_ERROREPC:
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case KVM_REG_MIPS_CP0_ERROREPC:
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kvm_write_c0_guest_errorepc(cop0, v);
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kvm_write_c0_guest_errorepc(cop0, v);
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break;
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break;
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/* registers to be handled specially */
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case KVM_REG_MIPS_CP0_COUNT:
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case KVM_REG_MIPS_CP0_COMPARE:
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return kvm_mips_callbacks->set_one_reg(vcpu, reg, v);
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default:
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default:
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return -EINVAL;
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return -EINVAL;
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}
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}
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@ -401,6 +401,40 @@ static int kvm_trap_emul_vcpu_setup(struct kvm_vcpu *vcpu)
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return 0;
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return 0;
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}
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}
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static int kvm_trap_emul_get_one_reg(struct kvm_vcpu *vcpu,
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const struct kvm_one_reg *reg,
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s64 *v)
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{
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switch (reg->id) {
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case KVM_REG_MIPS_CP0_COUNT:
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/* XXXKYMA: Run the Guest count register @ 1/4 the rate of the host */
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*v = (read_c0_count() >> 2);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int kvm_trap_emul_set_one_reg(struct kvm_vcpu *vcpu,
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const struct kvm_one_reg *reg,
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s64 v)
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{
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struct mips_coproc *cop0 = vcpu->arch.cop0;
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switch (reg->id) {
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case KVM_REG_MIPS_CP0_COUNT:
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/* Not supported yet */
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break;
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case KVM_REG_MIPS_CP0_COMPARE:
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kvm_write_c0_guest_compare(cop0, v);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static struct kvm_mips_callbacks kvm_trap_emul_callbacks = {
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static struct kvm_mips_callbacks kvm_trap_emul_callbacks = {
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/* exit handlers */
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/* exit handlers */
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.handle_cop_unusable = kvm_trap_emul_handle_cop_unusable,
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.handle_cop_unusable = kvm_trap_emul_handle_cop_unusable,
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@ -423,6 +457,8 @@ static struct kvm_mips_callbacks kvm_trap_emul_callbacks = {
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.dequeue_io_int = kvm_mips_dequeue_io_int_cb,
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.dequeue_io_int = kvm_mips_dequeue_io_int_cb,
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.irq_deliver = kvm_mips_irq_deliver_cb,
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.irq_deliver = kvm_mips_irq_deliver_cb,
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.irq_clear = kvm_mips_irq_clear_cb,
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.irq_clear = kvm_mips_irq_clear_cb,
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.get_one_reg = kvm_trap_emul_get_one_reg,
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.set_one_reg = kvm_trap_emul_set_one_reg,
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};
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};
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int kvm_mips_emulation_init(struct kvm_mips_callbacks **install_callbacks)
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int kvm_mips_emulation_init(struct kvm_mips_callbacks **install_callbacks)
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