drm/nve0/fifo: s/playlist/runlist/
As per Android GK20A driver. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@ -57,8 +57,8 @@ static const struct {
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#define FIFO_ENGINE_NR ARRAY_SIZE(fifo_engine)
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#define FIFO_ENGINE_NR ARRAY_SIZE(fifo_engine)
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struct nve0_fifo_engn {
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struct nve0_fifo_engn {
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struct nouveau_gpuobj *playlist[2];
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struct nouveau_gpuobj *runlist[2];
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int cur_playlist;
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int cur_runlist;
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};
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};
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struct nve0_fifo_priv {
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struct nve0_fifo_priv {
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@ -87,7 +87,7 @@ struct nve0_fifo_chan {
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******************************************************************************/
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******************************************************************************/
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static void
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static void
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nve0_fifo_playlist_update(struct nve0_fifo_priv *priv, u32 engine)
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nve0_fifo_runlist_update(struct nve0_fifo_priv *priv, u32 engine)
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{
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{
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struct nouveau_bar *bar = nouveau_bar(priv);
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struct nouveau_bar *bar = nouveau_bar(priv);
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struct nve0_fifo_engn *engn = &priv->engine[engine];
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struct nve0_fifo_engn *engn = &priv->engine[engine];
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@ -96,8 +96,8 @@ nve0_fifo_playlist_update(struct nve0_fifo_priv *priv, u32 engine)
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int i, p;
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int i, p;
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mutex_lock(&nv_subdev(priv)->mutex);
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mutex_lock(&nv_subdev(priv)->mutex);
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cur = engn->playlist[engn->cur_playlist];
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cur = engn->runlist[engn->cur_runlist];
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engn->cur_playlist = !engn->cur_playlist;
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engn->cur_runlist = !engn->cur_runlist;
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for (i = 0, p = 0; i < priv->base.max; i++) {
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for (i = 0, p = 0; i < priv->base.max; i++) {
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u32 ctrl = nv_rd32(priv, 0x800004 + (i * 8)) & 0x001f0001;
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u32 ctrl = nv_rd32(priv, 0x800004 + (i * 8)) & 0x001f0001;
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@ -112,7 +112,7 @@ nve0_fifo_playlist_update(struct nve0_fifo_priv *priv, u32 engine)
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nv_wr32(priv, 0x002270, cur->addr >> 12);
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nv_wr32(priv, 0x002270, cur->addr >> 12);
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nv_wr32(priv, 0x002274, (engine << 20) | (p >> 3));
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nv_wr32(priv, 0x002274, (engine << 20) | (p >> 3));
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if (!nv_wait(priv, 0x002284 + (engine * 4), 0x00100000, 0x00000000))
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if (!nv_wait(priv, 0x002284 + (engine * 4), 0x00100000, 0x00000000))
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nv_error(priv, "playlist %d update timeout\n", engine);
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nv_error(priv, "runlist %d update timeout\n", engine);
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mutex_unlock(&nv_subdev(priv)->mutex);
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mutex_unlock(&nv_subdev(priv)->mutex);
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}
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}
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@ -279,7 +279,7 @@ nve0_fifo_chan_init(struct nouveau_object *object)
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nv_mask(priv, 0x800004 + (chid * 8), 0x000f0000, chan->engine << 16);
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nv_mask(priv, 0x800004 + (chid * 8), 0x000f0000, chan->engine << 16);
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nv_wr32(priv, 0x800000 + (chid * 8), 0x80000000 | base->addr >> 12);
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nv_wr32(priv, 0x800000 + (chid * 8), 0x80000000 | base->addr >> 12);
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nv_mask(priv, 0x800004 + (chid * 8), 0x00000400, 0x00000400);
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nv_mask(priv, 0x800004 + (chid * 8), 0x00000400, 0x00000400);
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nve0_fifo_playlist_update(priv, chan->engine);
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nve0_fifo_runlist_update(priv, chan->engine);
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nv_mask(priv, 0x800004 + (chid * 8), 0x00000400, 0x00000400);
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nv_mask(priv, 0x800004 + (chid * 8), 0x00000400, 0x00000400);
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return 0;
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return 0;
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}
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}
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@ -292,7 +292,7 @@ nve0_fifo_chan_fini(struct nouveau_object *object, bool suspend)
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u32 chid = chan->base.chid;
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u32 chid = chan->base.chid;
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nv_mask(priv, 0x800004 + (chid * 8), 0x00000800, 0x00000800);
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nv_mask(priv, 0x800004 + (chid * 8), 0x00000800, 0x00000800);
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nve0_fifo_playlist_update(priv, chan->engine);
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nve0_fifo_runlist_update(priv, chan->engine);
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nv_wr32(priv, 0x800000 + (chid * 8), 0x00000000);
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nv_wr32(priv, 0x800000 + (chid * 8), 0x00000000);
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return nouveau_fifo_channel_fini(&chan->base, suspend);
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return nouveau_fifo_channel_fini(&chan->base, suspend);
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@ -544,8 +544,14 @@ nve0_fifo_intr(struct nouveau_subdev *subdev)
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}
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}
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if (stat & 0x40000000) {
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if (stat & 0x40000000) {
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nv_warn(priv, "unknown status 0x40000000\n");
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u32 mask = nv_mask(priv, 0x002a00, 0x00000000, 0x00000000);
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nv_mask(priv, 0x002a00, 0x00000000, 0x00000000);
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while (mask) {
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u32 engn = ffs(mask) - 1;
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/* runlist event, not currently used */
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mask &= ~(1 << engn);
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}
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stat &= ~0x40000000;
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stat &= ~0x40000000;
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}
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}
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@ -616,8 +622,8 @@ nve0_fifo_dtor(struct nouveau_object *object)
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nouveau_gpuobj_ref(NULL, &priv->user.mem);
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nouveau_gpuobj_ref(NULL, &priv->user.mem);
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for (i = 0; i < FIFO_ENGINE_NR; i++) {
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for (i = 0; i < FIFO_ENGINE_NR; i++) {
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nouveau_gpuobj_ref(NULL, &priv->engine[i].playlist[1]);
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nouveau_gpuobj_ref(NULL, &priv->engine[i].runlist[1]);
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nouveau_gpuobj_ref(NULL, &priv->engine[i].playlist[0]);
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nouveau_gpuobj_ref(NULL, &priv->engine[i].runlist[0]);
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}
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}
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nouveau_fifo_destroy(&priv->base);
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nouveau_fifo_destroy(&priv->base);
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@ -640,12 +646,12 @@ nve0_fifo_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
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for (i = 0; i < FIFO_ENGINE_NR; i++) {
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for (i = 0; i < FIFO_ENGINE_NR; i++) {
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ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x8000, 0x1000,
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ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x8000, 0x1000,
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0, &priv->engine[i].playlist[0]);
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0, &priv->engine[i].runlist[0]);
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if (ret)
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if (ret)
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return ret;
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return ret;
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ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x8000, 0x1000,
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ret = nouveau_gpuobj_new(nv_object(priv), NULL, 0x8000, 0x1000,
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0, &priv->engine[i].playlist[1]);
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0, &priv->engine[i].runlist[1]);
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if (ret)
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if (ret)
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return ret;
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return ret;
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}
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}
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