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OpenCloudOS-Kernel
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Merge branch 'reset' into release

This commit is contained in:
Len Brown 2011-03-23 02:34:15 -04:00
parent 5c129a8600 95cf3e12e7
commit f7f28f7e8c
2 changed files with 14 additions and 10 deletions
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10
drivers/acpi/acpica/hwxface.c
View File

@ -80,14 +80,14 @@ acpi_status acpi_reset(void)
if (reset_reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) { if (reset_reg->space_id == ACPI_ADR_SPACE_SYSTEM_IO) {
/* /*
* For I/O space, write directly to the OSL. This bypasses the port * For I/O space, write directly to the OSL. This
* validation mechanism, which may block a valid write to the reset * bypasses the port validation mechanism, which may
* register. * block a valid write to the reset register. Spec
* section 4.7.3.6 requires register width to be 8.
*/ */
status = status =
acpi_os_write_port((acpi_io_address) reset_reg->address, acpi_os_write_port((acpi_io_address) reset_reg->address,
acpi_gbl_FADT.reset_value, acpi_gbl_FADT.reset_value, 8);
reset_reg->bit_width);
} else { } else {
/* Write the reset value to the reset register */ /* Write the reset value to the reset register */

14
drivers/acpi/reboot.c
View File

@ -15,9 +15,15 @@ void acpi_reboot(void)
rr = &acpi_gbl_FADT.reset_register; rr = &acpi_gbl_FADT.reset_register;
/* Is the reset register supported? */ /* ACPI reset register was only introduced with v2 of the FADT */
if (!(acpi_gbl_FADT.flags & ACPI_FADT_RESET_REGISTER) ||
rr->bit_width != 8 || rr->bit_offset != 0) if (acpi_gbl_FADT.header.revision < 2)
return;
/* Is the reset register supported? The spec says we should be
* checking the bit width and bit offset, but Windows ignores
* these fields */
if (!(acpi_gbl_FADT.flags & ACPI_FADT_RESET_REGISTER))
return; return;
reset_value = acpi_gbl_FADT.reset_value; reset_value = acpi_gbl_FADT.reset_value;
@ -45,6 +51,4 @@ void acpi_reboot(void)
acpi_reset(); acpi_reset();
break; break;
} }
/* Wait ten seconds */
acpi_os_stall(10000000);
} }