Revert "powerpc/usb: fix usb CTRL_PHY_CLK_VALID breaks on some platform"
This reverts commit 79857e8e7b
.
To quote Shengzhou Liu:
I'm sorry, please don't apply this patch.
It appears not only on P1022 platform.
There will be more breaks on other platforms regarding
CTRL_PHY_CLK_VALID bit.
I will post a new patch with well compatibility on all
platforms as soon as I get necessary confirmations.
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: stable <stable@vger.kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
aac1fc386f
commit
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@ -248,11 +248,7 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
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struct usb_hcd *hcd = ehci_to_hcd(ehci);
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struct fsl_usb2_platform_data *pdata;
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void __iomem *non_ehci = hcd->regs;
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u32 temp, chip, rev, svr;
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svr = mfspr(SPRN_SVR);
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chip = svr >> 16;
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rev = (svr >> 4) & 0xf;
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u32 temp;
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pdata = hcd->self.controller->platform_data;
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@ -278,6 +274,12 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
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ehci_fsl_setup_phy(ehci, pdata->phy_mode, 0);
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if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
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unsigned int chip, rev, svr;
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svr = mfspr(SPRN_SVR);
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chip = svr >> 16;
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rev = (svr >> 4) & 0xf;
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/* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
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if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
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ehci->has_fsl_port_bug = 1;
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@ -299,15 +301,9 @@ static int ehci_fsl_usb_setup(struct ehci_hcd *ehci)
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out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
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}
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/* There is no CTRL_PHY_CLK_VALID bit on some platforms, e.g. P1022 */
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#define SVR_P1022_N_ID 0x80E6
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#define SVR_P1022_S_ID 0x80EE
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if (chip != SVR_P1022_N_ID && chip != SVR_P1022_S_ID) {
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if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
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CTRL_PHY_CLK_VALID)) {
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printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
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return -ENODEV;
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}
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if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & CTRL_PHY_CLK_VALID)) {
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printk(KERN_WARNING "fsl-ehci: USB PHY clock invalid\n");
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return -ENODEV;
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}
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return 0;
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}
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