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arm64: dts: rockchip: add rk3399 edp nodes 

Add an edp node, and also add edp endpoints to vopb and vopl
output port nodes.

Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Jacob Chen <jacob-chen@iotwrt.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Yakir Yang 2017-07-17 22:16:57 +08:00 committed by Heiko Stuebner
parent 3cf04a4e60
commit f7a29e30f8
1 changed files with 47 additions and 0 deletions
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47
arch/arm64/boot/dts/rockchip/rk3399.dtsi
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@ -1467,6 +1467,12 @@
vopl_out: port { vopl_out: port {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
vopl_out_edp: endpoint@1 {
reg = <1>;
remote-endpoint = <&edp_in_vopl>;
};
}; };
}; };
@ -1497,6 +1503,12 @@
vopb_out: port { vopb_out: port {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
vopb_out_edp: endpoint@0 {
reg = <0>;
remote-endpoint = <&edp_in_vopb>;
};
}; };
}; };
@ -1512,6 +1524,41 @@
status = "disabled"; status = "disabled";
}; };
edp: edp@ff970000 {
compatible = "rockchip,rk3399-edp";
reg = <0x0 0xff970000 0x0 0x8000>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru PCLK_EDP>, <&cru PCLK_EDP_CTRL>;
clock-names = "dp", "pclk";
pinctrl-names = "default";
pinctrl-0 = <&edp_hpd>;
power-domains = <&power RK3399_PD_EDP>;
resets = <&cru SRST_P_EDP_CTRL>;
reset-names = "dp";
rockchip,grf = <&grf>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
edp_in: port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
edp_in_vopb: endpoint@0 {
reg = <0>;
remote-endpoint = <&vopb_out_edp>;
};
edp_in_vopl: endpoint@1 {
reg = <1>;
remote-endpoint = <&vopl_out_edp>;
};
};
};
};
gpu: gpu@ff9a0000 { gpu: gpu@ff9a0000 {
compatible = "rockchip,rk3399-mali", "arm,mali-t860"; compatible = "rockchip,rk3399-mali", "arm,mali-t860";
reg = <0x0 0xff9a0000 0x0 0x10000>; reg = <0x0 0xff9a0000 0x0 0x10000>;