This pull request contains Broadcom ARM-based SoCs Kconfig/machine entry
changes for 5.12, please pull the following: - Maxime adds a select of the Broadcom STB standard L2 interrupt controller driver which is used in the Raspberry Pi 4 HDMI controller to support I2C and CEC interrupts - Florian adds a debug URT entry for the 72116 STB SoC -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmAXKL4ACgkQh9CWnEQH BwRcahAAhPImzrTkjsZhr1Qa9L26pwBPh2Q55C9vBUuYiAPei7OTdgf1tCPm3cja J70OlYZiFlOWUnTyha4G00gyVRLkAxDNau8iCoJ+2cHpUMHXgYz0Rg5dLXEpAFvH yvxYS+cj78f+thmogH60cu6AMqowU+868mK0ivlwKMt+z4Mce3fIPhJaxWGDNoBy GHHvwv3WBCw8ltlezEJDUrLQ3A1IMMIGk1qRKVpsd6kkH/h/lERuVowgvjztN0Qh QVi3pn3Xu3p9Y4OMQIbDkBiVklrkpcUODLA5ZBieDbmV6DmWMisKaFbYg0BBn/Kt pvKylCHITNDSh1lNcAnxnoiCm0kKf0CE6Y+m8jaVwoC6MNm6Vc0xrX4Uquz2TWjp 5Z9lY0xO3YF2RhtlINkzO/VxndgJIp1f/2gpn3CNvF5pTbHx5ClQsCYk7YfohHYe DV237IeMLSgmLWW9ijujRqsgGB2GV2KMsJH3NVnqYwIYpbURgbZ+oZBfuKkeHyCi y22Kc3RT8EdRFHVbKiIO8npXRl4L6WBcJlwowmasbW150O6X8ckPgRdvXC9O9KVs x2v+0pjZz30kv0JeGy7HaUwJY8y84G7IHCRuXKy+BHZWMX6pFPbQq/sOo8xV45zt Vg/XcZDSBjLQZFBaookKurDlsB5on3sY6rzQrYbzzjkFYmLX1Iw= =aVSR -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-5.12/soc' of https://github.com/Broadcom/stblinux into arm/soc This pull request contains Broadcom ARM-based SoCs Kconfig/machine entry changes for 5.12, please pull the following: - Maxime adds a select of the Broadcom STB standard L2 interrupt controller driver which is used in the Raspberry Pi 4 HDMI controller to support I2C and CEC interrupts - Florian adds a debug URT entry for the 72116 STB SoC * tag 'arm-soc/for-5.12/soc' of https://github.com/Broadcom/stblinux: ARM: bcm: Select BRCMSTB_L2_IRQ for bcm2835 ARM: brcmstb: Add debug UART entry for 72116 Link: https://lore.kernel.org/r/20210131221721.685974-6-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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commit
f79bf56fb2
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@ -25,6 +25,7 @@
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#define SUN_TOP_CTRL_BASE_V7 REG_PHYS_ADDR_V7(0x404000)
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#define UARTA_3390 REG_PHYS_ADDR(0x40a900)
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#define UARTA_72116 UARTA_7255
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#define UARTA_7250 REG_PHYS_ADDR(0x40b400)
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#define UARTA_7255 REG_PHYS_ADDR(0x40c000)
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#define UARTA_7260 UARTA_7255
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@ -85,20 +86,21 @@ ARM_BE8( rev \rv, \rv )
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/* Chip specific detection starts here */
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20: checkuart(\rp, \rv, 0x33900000, 3390)
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21: checkuart(\rp, \rv, 0x72160000, 7216)
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22: checkuart(\rp, \rv, 0x07216400, 72164)
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23: checkuart(\rp, \rv, 0x07216500, 72165)
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24: checkuart(\rp, \rv, 0x72500000, 7250)
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25: checkuart(\rp, \rv, 0x72550000, 7255)
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26: checkuart(\rp, \rv, 0x72600000, 7260)
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27: checkuart(\rp, \rv, 0x72680000, 7268)
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28: checkuart(\rp, \rv, 0x72710000, 7271)
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29: checkuart(\rp, \rv, 0x72780000, 7278)
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30: checkuart(\rp, \rv, 0x73640000, 7364)
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31: checkuart(\rp, \rv, 0x73660000, 7366)
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32: checkuart(\rp, \rv, 0x07437100, 74371)
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33: checkuart(\rp, \rv, 0x74390000, 7439)
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34: checkuart(\rp, \rv, 0x74450000, 7445)
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21: checkuart(\rp, \rv, 0x07211600, 72116)
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22: checkuart(\rp, \rv, 0x72160000, 7216)
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23: checkuart(\rp, \rv, 0x07216400, 72164)
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24: checkuart(\rp, \rv, 0x07216500, 72165)
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25: checkuart(\rp, \rv, 0x72500000, 7250)
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26: checkuart(\rp, \rv, 0x72550000, 7255)
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27: checkuart(\rp, \rv, 0x72600000, 7260)
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28: checkuart(\rp, \rv, 0x72680000, 7268)
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29: checkuart(\rp, \rv, 0x72710000, 7271)
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30: checkuart(\rp, \rv, 0x72780000, 7278)
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31: checkuart(\rp, \rv, 0x73640000, 7364)
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32: checkuart(\rp, \rv, 0x73660000, 7366)
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33: checkuart(\rp, \rv, 0x07437100, 74371)
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34: checkuart(\rp, \rv, 0x74390000, 7439)
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35: checkuart(\rp, \rv, 0x74450000, 7445)
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/* No valid UART found */
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90: mov \rp, #0
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@ -161,6 +161,7 @@ config ARCH_BCM2835
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select ARM_TIMER_SP804
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select HAVE_ARM_ARCH_TIMER if ARCH_MULTI_V7
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select BCM2835_TIMER
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select BRCMSTB_L2_IRQ
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select PINCTRL
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select PINCTRL_BCM2835
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select MFD_CORE
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@ -39,6 +39,7 @@ config ARCH_BCM2835
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select ARM_AMBA
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select ARM_GIC
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select ARM_TIMER_SP804
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select BRCMSTB_L2_IRQ
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help
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This enables support for the Broadcom BCM2837 and BCM2711 SoC.
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These SoCs are used in the Raspberry Pi 3 and 4 devices.
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