IB/mlx4: Add receive flow steering support
Implement ib_create_flow() and ib_destroy_flow(). Translate the verbs structures provided by the user to HW structures and call the MLX4_QP_FLOW_STEERING_ATTACH/DETACH firmware commands. On the ATTACH command completion, the firmware provides a 64-bit registration ID, which is placed into struct mlx4_ib_flow that wraps the instance of struct ib_flow which is retuned to caller. Later, this reg ID is used for detaching that flow from the firmware. Signed-off-by: Hadar Hen Zion <hadarh@mellanox.com> Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: Roland Dreier <roland@purestorage.com>
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436f2ad05a
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@ -54,6 +54,8 @@
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#define DRV_VERSION "1.0"
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#define DRV_RELDATE "April 4, 2008"
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#define MLX4_IB_FLOW_MAX_PRIO 0xFFF
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MODULE_AUTHOR("Roland Dreier");
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MODULE_DESCRIPTION("Mellanox ConnectX HCA InfiniBand driver");
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MODULE_LICENSE("Dual BSD/GPL");
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@ -88,6 +90,25 @@ static void init_query_mad(struct ib_smp *mad)
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static union ib_gid zgid;
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static int check_flow_steering_support(struct mlx4_dev *dev)
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{
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int ib_num_ports = 0;
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int i;
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mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB)
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ib_num_ports++;
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if (dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED) {
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if (ib_num_ports || mlx4_is_mfunc(dev)) {
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pr_warn("Device managed flow steering is unavailable "
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"for IB ports or in multifunction env.\n");
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return 0;
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}
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return 1;
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}
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return 0;
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}
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static int mlx4_ib_query_device(struct ib_device *ibdev,
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struct ib_device_attr *props)
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{
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@ -144,6 +165,8 @@ static int mlx4_ib_query_device(struct ib_device *ibdev,
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props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
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else
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props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2A;
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if (check_flow_steering_support(dev->dev))
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props->device_cap_flags |= IB_DEVICE_MANAGED_FLOW_STEERING;
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}
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props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
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@ -798,6 +821,209 @@ struct mlx4_ib_steering {
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union ib_gid gid;
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};
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static int parse_flow_attr(struct mlx4_dev *dev,
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union ib_flow_spec *ib_spec,
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struct _rule_hw *mlx4_spec)
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{
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enum mlx4_net_trans_rule_id type;
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switch (ib_spec->type) {
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case IB_FLOW_SPEC_ETH:
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type = MLX4_NET_TRANS_RULE_ID_ETH;
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memcpy(mlx4_spec->eth.dst_mac, ib_spec->eth.val.dst_mac,
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ETH_ALEN);
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memcpy(mlx4_spec->eth.dst_mac_msk, ib_spec->eth.mask.dst_mac,
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ETH_ALEN);
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mlx4_spec->eth.vlan_tag = ib_spec->eth.val.vlan_tag;
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mlx4_spec->eth.vlan_tag_msk = ib_spec->eth.mask.vlan_tag;
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break;
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case IB_FLOW_SPEC_IPV4:
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type = MLX4_NET_TRANS_RULE_ID_IPV4;
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mlx4_spec->ipv4.src_ip = ib_spec->ipv4.val.src_ip;
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mlx4_spec->ipv4.src_ip_msk = ib_spec->ipv4.mask.src_ip;
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mlx4_spec->ipv4.dst_ip = ib_spec->ipv4.val.dst_ip;
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mlx4_spec->ipv4.dst_ip_msk = ib_spec->ipv4.mask.dst_ip;
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break;
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case IB_FLOW_SPEC_TCP:
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case IB_FLOW_SPEC_UDP:
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type = ib_spec->type == IB_FLOW_SPEC_TCP ?
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MLX4_NET_TRANS_RULE_ID_TCP :
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MLX4_NET_TRANS_RULE_ID_UDP;
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mlx4_spec->tcp_udp.dst_port = ib_spec->tcp_udp.val.dst_port;
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mlx4_spec->tcp_udp.dst_port_msk = ib_spec->tcp_udp.mask.dst_port;
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mlx4_spec->tcp_udp.src_port = ib_spec->tcp_udp.val.src_port;
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mlx4_spec->tcp_udp.src_port_msk = ib_spec->tcp_udp.mask.src_port;
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break;
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default:
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return -EINVAL;
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}
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if (mlx4_map_sw_to_hw_steering_id(dev, type) < 0 ||
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mlx4_hw_rule_sz(dev, type) < 0)
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return -EINVAL;
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mlx4_spec->id = cpu_to_be16(mlx4_map_sw_to_hw_steering_id(dev, type));
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mlx4_spec->size = mlx4_hw_rule_sz(dev, type) >> 2;
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return mlx4_hw_rule_sz(dev, type);
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}
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static int __mlx4_ib_create_flow(struct ib_qp *qp, struct ib_flow_attr *flow_attr,
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int domain,
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enum mlx4_net_trans_promisc_mode flow_type,
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u64 *reg_id)
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{
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int ret, i;
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int size = 0;
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void *ib_flow;
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struct mlx4_ib_dev *mdev = to_mdev(qp->device);
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struct mlx4_cmd_mailbox *mailbox;
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struct mlx4_net_trans_rule_hw_ctrl *ctrl;
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size_t rule_size = sizeof(struct mlx4_net_trans_rule_hw_ctrl) +
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(sizeof(struct _rule_hw) * flow_attr->num_of_specs);
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static const u16 __mlx4_domain[] = {
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[IB_FLOW_DOMAIN_USER] = MLX4_DOMAIN_UVERBS,
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[IB_FLOW_DOMAIN_ETHTOOL] = MLX4_DOMAIN_ETHTOOL,
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[IB_FLOW_DOMAIN_RFS] = MLX4_DOMAIN_RFS,
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[IB_FLOW_DOMAIN_NIC] = MLX4_DOMAIN_NIC,
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};
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if (flow_attr->priority > MLX4_IB_FLOW_MAX_PRIO) {
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pr_err("Invalid priority value %d\n", flow_attr->priority);
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return -EINVAL;
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}
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if (domain >= IB_FLOW_DOMAIN_NUM) {
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pr_err("Invalid domain value %d\n", domain);
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return -EINVAL;
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}
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if (mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type) < 0)
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return -EINVAL;
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mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
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if (IS_ERR(mailbox))
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return PTR_ERR(mailbox);
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memset(mailbox->buf, 0, rule_size);
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ctrl = mailbox->buf;
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ctrl->prio = cpu_to_be16(__mlx4_domain[domain] |
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flow_attr->priority);
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ctrl->type = mlx4_map_sw_to_hw_steering_mode(mdev->dev, flow_type);
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ctrl->port = flow_attr->port;
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ctrl->qpn = cpu_to_be32(qp->qp_num);
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ib_flow = flow_attr + 1;
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size += sizeof(struct mlx4_net_trans_rule_hw_ctrl);
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for (i = 0; i < flow_attr->num_of_specs; i++) {
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ret = parse_flow_attr(mdev->dev, ib_flow, mailbox->buf + size);
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if (ret < 0) {
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mlx4_free_cmd_mailbox(mdev->dev, mailbox);
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return -EINVAL;
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}
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ib_flow += ((union ib_flow_spec *) ib_flow)->size;
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size += ret;
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}
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ret = mlx4_cmd_imm(mdev->dev, mailbox->dma, reg_id, size >> 2, 0,
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MLX4_QP_FLOW_STEERING_ATTACH, MLX4_CMD_TIME_CLASS_A,
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MLX4_CMD_NATIVE);
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if (ret == -ENOMEM)
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pr_err("mcg table is full. Fail to register network rule.\n");
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else if (ret == -ENXIO)
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pr_err("Device managed flow steering is disabled. Fail to register network rule.\n");
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else if (ret)
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pr_err("Invalid argumant. Fail to register network rule.\n");
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mlx4_free_cmd_mailbox(mdev->dev, mailbox);
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return ret;
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}
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static int __mlx4_ib_destroy_flow(struct mlx4_dev *dev, u64 reg_id)
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{
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int err;
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err = mlx4_cmd(dev, reg_id, 0, 0,
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MLX4_QP_FLOW_STEERING_DETACH, MLX4_CMD_TIME_CLASS_A,
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MLX4_CMD_NATIVE);
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if (err)
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pr_err("Fail to detach network rule. registration id = 0x%llx\n",
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reg_id);
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return err;
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}
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static struct ib_flow *mlx4_ib_create_flow(struct ib_qp *qp,
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struct ib_flow_attr *flow_attr,
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int domain)
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{
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int err = 0, i = 0;
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struct mlx4_ib_flow *mflow;
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enum mlx4_net_trans_promisc_mode type[2];
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memset(type, 0, sizeof(type));
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mflow = kzalloc(sizeof(*mflow), GFP_KERNEL);
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if (!mflow) {
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err = -ENOMEM;
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goto err_free;
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}
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switch (flow_attr->type) {
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case IB_FLOW_ATTR_NORMAL:
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type[0] = MLX4_FS_REGULAR;
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break;
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case IB_FLOW_ATTR_ALL_DEFAULT:
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type[0] = MLX4_FS_ALL_DEFAULT;
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break;
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case IB_FLOW_ATTR_MC_DEFAULT:
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type[0] = MLX4_FS_MC_DEFAULT;
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break;
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case IB_FLOW_ATTR_SNIFFER:
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type[0] = MLX4_FS_UC_SNIFFER;
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type[1] = MLX4_FS_MC_SNIFFER;
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break;
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default:
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err = -EINVAL;
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goto err_free;
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}
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while (i < ARRAY_SIZE(type) && type[i]) {
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err = __mlx4_ib_create_flow(qp, flow_attr, domain, type[i],
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&mflow->reg_id[i]);
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if (err)
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goto err_free;
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i++;
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}
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return &mflow->ibflow;
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err_free:
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kfree(mflow);
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return ERR_PTR(err);
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}
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static int mlx4_ib_destroy_flow(struct ib_flow *flow_id)
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{
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int err, ret = 0;
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int i = 0;
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struct mlx4_ib_dev *mdev = to_mdev(flow_id->qp->device);
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struct mlx4_ib_flow *mflow = to_mflow(flow_id);
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while (i < ARRAY_SIZE(mflow->reg_id) && mflow->reg_id[i]) {
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err = __mlx4_ib_destroy_flow(mdev->dev, mflow->reg_id[i]);
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if (err)
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ret = err;
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i++;
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}
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kfree(mflow);
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return ret;
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}
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static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
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{
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int err;
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@ -1461,6 +1687,15 @@ static void *mlx4_ib_add(struct mlx4_dev *dev)
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(1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
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}
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if (check_flow_steering_support(dev)) {
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ibdev->ib_dev.create_flow = mlx4_ib_create_flow;
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ibdev->ib_dev.destroy_flow = mlx4_ib_destroy_flow;
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ibdev->ib_dev.uverbs_cmd_mask |=
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(1ull << IB_USER_VERBS_CMD_CREATE_FLOW) |
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(1ull << IB_USER_VERBS_CMD_DESTROY_FLOW);
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}
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mlx4_ib_alloc_eqs(dev, ibdev);
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spin_lock_init(&iboe->lock);
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@ -132,6 +132,12 @@ struct mlx4_ib_fmr {
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struct mlx4_fmr mfmr;
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};
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struct mlx4_ib_flow {
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struct ib_flow ibflow;
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/* translating DMFS verbs sniffer rule to FW API requires two reg IDs */
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u64 reg_id[2];
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};
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struct mlx4_ib_wq {
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u64 *wrid;
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spinlock_t lock;
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@ -552,6 +558,12 @@ static inline struct mlx4_ib_fmr *to_mfmr(struct ib_fmr *ibfmr)
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{
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return container_of(ibfmr, struct mlx4_ib_fmr, ibfmr);
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}
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static inline struct mlx4_ib_flow *to_mflow(struct ib_flow *ibflow)
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{
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return container_of(ibflow, struct mlx4_ib_flow, ibflow);
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}
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static inline struct mlx4_ib_qp *to_mqp(struct ib_qp *ibqp)
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{
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return container_of(ibqp, struct mlx4_ib_qp, ibqp);
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@ -1052,11 +1052,6 @@ struct _rule_hw {
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};
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};
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/* translating DMFS verbs sniffer rule to the FW API would need two reg IDs */
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struct mlx4_flow_handle {
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u64 reg_id[2];
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};
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int mlx4_flow_steer_promisc_add(struct mlx4_dev *dev, u8 port, u32 qpn,
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enum mlx4_net_trans_promisc_mode mode);
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int mlx4_flow_steer_promisc_remove(struct mlx4_dev *dev, u8 port,
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