ARM: shmobile: sh73a0: add MSTP clock assignments to DT
Assigns clocks to cmt1, i2c*, mmcif, sdhi*, and scif*. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -56,6 +56,8 @@
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renesas,channels-mask = <0x3f>;
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clocks = <&mstp3_clks SH73A0_CLK_CMT1>;
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clock-names = "fck";
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status = "disabled";
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};
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@ -145,6 +147,7 @@
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0 168 IRQ_TYPE_LEVEL_HIGH
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0 169 IRQ_TYPE_LEVEL_HIGH
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0 170 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp1_clks SH73A0_CLK_IIC0>;
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status = "disabled";
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};
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@ -157,6 +160,7 @@
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0 52 IRQ_TYPE_LEVEL_HIGH
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0 53 IRQ_TYPE_LEVEL_HIGH
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0 54 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks SH73A0_CLK_IIC1>;
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status = "disabled";
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};
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@ -169,6 +173,7 @@
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0 172 IRQ_TYPE_LEVEL_HIGH
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0 173 IRQ_TYPE_LEVEL_HIGH
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0 174 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp0_clks SH73A0_CLK_IIC2>;
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status = "disabled";
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};
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@ -181,6 +186,7 @@
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0 184 IRQ_TYPE_LEVEL_HIGH
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0 185 IRQ_TYPE_LEVEL_HIGH
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0 186 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp4_clks SH73A0_CLK_IIC3>;
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status = "disabled";
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};
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@ -193,6 +199,7 @@
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0 188 IRQ_TYPE_LEVEL_HIGH
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0 189 IRQ_TYPE_LEVEL_HIGH
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0 190 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp4_clks SH73A0_CLK_IIC4>;
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status = "disabled";
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};
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@ -201,6 +208,7 @@
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reg = <0xe6bd0000 0x100>;
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interrupts = <0 140 IRQ_TYPE_LEVEL_HIGH
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0 141 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks SH73A0_CLK_MMCIF0>;
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reg-io-width = <4>;
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status = "disabled";
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};
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@ -211,6 +219,7 @@
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interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH
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0 84 IRQ_TYPE_LEVEL_HIGH
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0 85 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks SH73A0_CLK_SDHI0>;
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cap-sd-highspeed;
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status = "disabled";
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};
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@ -221,6 +230,7 @@
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reg = <0xee120000 0x100>;
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interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH
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0 89 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks SH73A0_CLK_SDHI1>;
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toshiba,mmc-wrprotect-disable;
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cap-sd-highspeed;
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status = "disabled";
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@ -231,6 +241,7 @@
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reg = <0xee140000 0x100>;
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interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH
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0 105 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks SH73A0_CLK_SDHI2>;
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toshiba,mmc-wrprotect-disable;
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cap-sd-highspeed;
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status = "disabled";
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@ -240,6 +251,8 @@
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compatible = "renesas,scifa-sh73a0", "renesas,scifa";
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reg = <0xe6c40000 0x100>;
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interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp2_clks SH73A0_CLK_SCIFA0>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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@ -247,6 +260,8 @@
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compatible = "renesas,scifa-sh73a0", "renesas,scifa";
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reg = <0xe6c50000 0x100>;
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interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp2_clks SH73A0_CLK_SCIFA1>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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@ -254,6 +269,8 @@
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compatible = "renesas,scifa-sh73a0", "renesas,scifa";
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reg = <0xe6c60000 0x100>;
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interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp2_clks SH73A0_CLK_SCIFA2>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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@ -261,6 +278,8 @@
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compatible = "renesas,scifa-sh73a0", "renesas,scifa";
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reg = <0xe6c70000 0x100>;
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interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp2_clks SH73A0_CLK_SCIFA3>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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@ -268,6 +287,8 @@
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compatible = "renesas,scifa-sh73a0", "renesas,scifa";
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reg = <0xe6c80000 0x100>;
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interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp2_clks SH73A0_CLK_SCIFA4>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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@ -275,6 +296,8 @@
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compatible = "renesas,scifa-sh73a0", "renesas,scifa";
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reg = <0xe6cb0000 0x100>;
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interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp2_clks SH73A0_CLK_SCIFA5>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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@ -282,6 +305,8 @@
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compatible = "renesas,scifa-sh73a0", "renesas,scifa";
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reg = <0xe6cc0000 0x100>;
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interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp3_clks SH73A0_CLK_SCIFA6>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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@ -289,6 +314,8 @@
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compatible = "renesas,scifa-sh73a0", "renesas,scifa";
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reg = <0xe6cd0000 0x100>;
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interrupts = <0 143 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp2_clks SH73A0_CLK_SCIFA7>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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@ -296,6 +323,8 @@
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compatible = "renesas,scifb-sh73a0", "renesas,scifb";
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reg = <0xe6c30000 0x100>;
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interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&mstp2_clks SH73A0_CLK_SCIFB>;
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clock-names = "sci_ick";
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status = "disabled";
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};
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