diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi
index 0aa74355e24f..0d63dbe11e0d 100644
--- a/arch/arm/boot/dts/r7s72100.dtsi
+++ b/arch/arm/boot/dts/r7s72100.dtsi
@@ -110,6 +110,289 @@
 		#size-cells = <1>;
 		ranges;
 
+		L2: cache-controller@3ffff000 {
+			compatible = "arm,pl310-cache";
+			reg = <0x3ffff000 0x1000>;
+			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+			arm,early-bresp-disable;
+			arm,full-line-zero-disable;
+			cache-unified;
+			cache-level = <2>;
+		};
+
+		scif0: serial@e8007000 {
+			compatible = "renesas,scif-r7s72100", "renesas,scif";
+			reg = <0xe8007000 64>;
+			interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
+			clock-names = "fck";
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
+		scif1: serial@e8007800 {
+			compatible = "renesas,scif-r7s72100", "renesas,scif";
+			reg = <0xe8007800 64>;
+			interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
+			clock-names = "fck";
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
+		scif2: serial@e8008000 {
+			compatible = "renesas,scif-r7s72100", "renesas,scif";
+			reg = <0xe8008000 64>;
+			interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
+			clock-names = "fck";
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
+		scif3: serial@e8008800 {
+			compatible = "renesas,scif-r7s72100", "renesas,scif";
+			reg = <0xe8008800 64>;
+			interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
+			clock-names = "fck";
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
+		scif4: serial@e8009000 {
+			compatible = "renesas,scif-r7s72100", "renesas,scif";
+			reg = <0xe8009000 64>;
+			interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp4_clks R7S72100_CLK_SCIF4>;
+			clock-names = "fck";
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
+		scif5: serial@e8009800 {
+			compatible = "renesas,scif-r7s72100", "renesas,scif";
+			reg = <0xe8009800 64>;
+			interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp4_clks R7S72100_CLK_SCIF5>;
+			clock-names = "fck";
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
+		scif6: serial@e800a000 {
+			compatible = "renesas,scif-r7s72100", "renesas,scif";
+			reg = <0xe800a000 64>;
+			interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp4_clks R7S72100_CLK_SCIF6>;
+			clock-names = "fck";
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
+		scif7: serial@e800a800 {
+			compatible = "renesas,scif-r7s72100", "renesas,scif";
+			reg = <0xe800a800 64>;
+			interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp4_clks R7S72100_CLK_SCIF7>;
+			clock-names = "fck";
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
+		spi0: spi@e800c800 {
+			compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+			reg = <0xe800c800 0x24>;
+			interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error", "rx", "tx";
+			clocks = <&mstp10_clks R7S72100_CLK_SPI0>;
+			power-domains = <&cpg_clocks>;
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		spi1: spi@e800d000 {
+			compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+			reg = <0xe800d000 0x24>;
+			interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error", "rx", "tx";
+			clocks = <&mstp10_clks R7S72100_CLK_SPI1>;
+			power-domains = <&cpg_clocks>;
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		spi2: spi@e800d800 {
+			compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+			reg = <0xe800d800 0x24>;
+			interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error", "rx", "tx";
+			clocks = <&mstp10_clks R7S72100_CLK_SPI2>;
+			power-domains = <&cpg_clocks>;
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		spi3: spi@e800e000 {
+			compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+			reg = <0xe800e000 0x24>;
+			interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error", "rx", "tx";
+			clocks = <&mstp10_clks R7S72100_CLK_SPI3>;
+			power-domains = <&cpg_clocks>;
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		spi4: spi@e800e800 {
+			compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
+			reg = <0xe800e800 0x24>;
+			interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "error", "rx", "tx";
+			clocks = <&mstp10_clks R7S72100_CLK_SPI4>;
+			power-domains = <&cpg_clocks>;
+			num-cs = <1>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		usbhs0: usb@e8010000 {
+			compatible = "renesas,usbhs-r7s72100", "renesas,rza1-usbhs";
+			reg = <0xe8010000 0x1a0>;
+			interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp7_clks R7S72100_CLK_USB0>;
+			renesas,buswait = <4>;
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
+		usbhs1: usb@e8207000 {
+			compatible = "renesas,usbhs-r7s72100", "renesas,rza1-usbhs";
+			reg = <0xe8207000 0x1a0>;
+			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp7_clks R7S72100_CLK_USB1>;
+			renesas,buswait = <4>;
+			power-domains = <&cpg_clocks>;
+			status = "disabled";
+		};
+
+		mmcif: mmc@e804c800 {
+			compatible = "renesas,mmcif-r7s72100", "renesas,sh-mmcif";
+			reg = <0xe804c800 0x80>;
+			interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp8_clks R7S72100_CLK_MMCIF>;
+			power-domains = <&cpg_clocks>;
+			reg-io-width = <4>;
+			bus-width = <8>;
+			status = "disabled";
+		};
+
+		sdhi0: sd@e804e000 {
+			compatible = "renesas,sdhi-r7s72100";
+			reg = <0xe804e000 0x100>;
+			interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+
+			clocks = <&mstp12_clks R7S72100_CLK_SDHI00>,
+				 <&mstp12_clks R7S72100_CLK_SDHI01>;
+			clock-names = "core", "cd";
+			power-domains = <&cpg_clocks>;
+			cap-sd-highspeed;
+			cap-sdio-irq;
+			status = "disabled";
+		};
+
+		sdhi1: sd@e804e800 {
+			compatible = "renesas,sdhi-r7s72100";
+			reg = <0xe804e800 0x100>;
+			interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH
+				      GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>;
+
+			clocks = <&mstp12_clks R7S72100_CLK_SDHI10>,
+				 <&mstp12_clks R7S72100_CLK_SDHI11>;
+			clock-names = "core", "cd";
+			power-domains = <&cpg_clocks>;
+			cap-sd-highspeed;
+			cap-sdio-irq;
+			status = "disabled";
+		};
+
+		gic: interrupt-controller@e8201000 {
+			compatible = "arm,pl390";
+			#interrupt-cells = <3>;
+			#address-cells = <0>;
+			interrupt-controller;
+			reg = <0xe8201000 0x1000>,
+				<0xe8202000 0x1000>;
+		};
+
+		ether: ethernet@e8203000 {
+			compatible = "renesas,ether-r7s72100";
+			reg = <0xe8203000 0x800>,
+			      <0xe8204800 0x200>;
+			interrupts = <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&mstp7_clks R7S72100_CLK_ETHER>;
+			power-domains = <&cpg_clocks>;
+			phy-mode = "mii";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		wdt: watchdog@fcfe0000 {
+			compatible = "renesas,r7s72100-wdt", "renesas,rza-wdt";
+			reg = <0xfcfe0000 0x6>;
+			interrupts = <GIC_SPI 106 IRQ_TYPE_EDGE_RISING>;
+			clocks = <&p0_clk>;
+		};
+
 		/* Special CPG clocks */
 		cpg_clocks: cpg_clocks@fcfe0000 {
 			#clock-cells = <1>;
@@ -293,211 +576,24 @@
 			};
 		};
 
-		scif0: serial@e8007000 {
-			compatible = "renesas,scif-r7s72100", "renesas,scif";
-			reg = <0xe8007000 64>;
-			interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&mstp4_clks R7S72100_CLK_SCIF0>;
-			clock-names = "fck";
+		ostm0: timer@fcfec000 {
+			compatible = "renesas,r7s72100-ostm", "renesas,ostm";
+			reg = <0xfcfec000 0x30>;
+			interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>;
+			clocks = <&mstp5_clks R7S72100_CLK_OSTM0>;
 			power-domains = <&cpg_clocks>;
 			status = "disabled";
 		};
 
-		scif1: serial@e8007800 {
-			compatible = "renesas,scif-r7s72100", "renesas,scif";
-			reg = <0xe8007800 64>;
-			interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&mstp4_clks R7S72100_CLK_SCIF1>;
-			clock-names = "fck";
+		ostm1: timer@fcfec400 {
+			compatible = "renesas,r7s72100-ostm", "renesas,ostm";
+			reg = <0xfcfec400 0x30>;
+			interrupts = <GIC_SPI 103 IRQ_TYPE_EDGE_RISING>;
+			clocks = <&mstp5_clks R7S72100_CLK_OSTM1>;
 			power-domains = <&cpg_clocks>;
 			status = "disabled";
 		};
 
-		scif2: serial@e8008000 {
-			compatible = "renesas,scif-r7s72100", "renesas,scif";
-			reg = <0xe8008000 64>;
-			interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&mstp4_clks R7S72100_CLK_SCIF2>;
-			clock-names = "fck";
-			power-domains = <&cpg_clocks>;
-			status = "disabled";
-		};
-
-		scif3: serial@e8008800 {
-			compatible = "renesas,scif-r7s72100", "renesas,scif";
-			reg = <0xe8008800 64>;
-			interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&mstp4_clks R7S72100_CLK_SCIF3>;
-			clock-names = "fck";
-			power-domains = <&cpg_clocks>;
-			status = "disabled";
-		};
-
-		scif4: serial@e8009000 {
-			compatible = "renesas,scif-r7s72100", "renesas,scif";
-			reg = <0xe8009000 64>;
-			interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&mstp4_clks R7S72100_CLK_SCIF4>;
-			clock-names = "fck";
-			power-domains = <&cpg_clocks>;
-			status = "disabled";
-		};
-
-		scif5: serial@e8009800 {
-			compatible = "renesas,scif-r7s72100", "renesas,scif";
-			reg = <0xe8009800 64>;
-			interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&mstp4_clks R7S72100_CLK_SCIF5>;
-			clock-names = "fck";
-			power-domains = <&cpg_clocks>;
-			status = "disabled";
-		};
-
-		scif6: serial@e800a000 {
-			compatible = "renesas,scif-r7s72100", "renesas,scif";
-			reg = <0xe800a000 64>;
-			interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&mstp4_clks R7S72100_CLK_SCIF6>;
-			clock-names = "fck";
-			power-domains = <&cpg_clocks>;
-			status = "disabled";
-		};
-
-		scif7: serial@e800a800 {
-			compatible = "renesas,scif-r7s72100", "renesas,scif";
-			reg = <0xe800a800 64>;
-			interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&mstp4_clks R7S72100_CLK_SCIF7>;
-			clock-names = "fck";
-			power-domains = <&cpg_clocks>;
-			status = "disabled";
-		};
-
-		spi0: spi@e800c800 {
-			compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
-			reg = <0xe800c800 0x24>;
-			interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "error", "rx", "tx";
-			clocks = <&mstp10_clks R7S72100_CLK_SPI0>;
-			power-domains = <&cpg_clocks>;
-			num-cs = <1>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			status = "disabled";
-		};
-
-		spi1: spi@e800d000 {
-			compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
-			reg = <0xe800d000 0x24>;
-			interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "error", "rx", "tx";
-			clocks = <&mstp10_clks R7S72100_CLK_SPI1>;
-			power-domains = <&cpg_clocks>;
-			num-cs = <1>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			status = "disabled";
-		};
-
-		spi2: spi@e800d800 {
-			compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
-			reg = <0xe800d800 0x24>;
-			interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "error", "rx", "tx";
-			clocks = <&mstp10_clks R7S72100_CLK_SPI2>;
-			power-domains = <&cpg_clocks>;
-			num-cs = <1>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			status = "disabled";
-		};
-
-		spi3: spi@e800e000 {
-			compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
-			reg = <0xe800e000 0x24>;
-			interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 248 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "error", "rx", "tx";
-			clocks = <&mstp10_clks R7S72100_CLK_SPI3>;
-			power-domains = <&cpg_clocks>;
-			num-cs = <1>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			status = "disabled";
-		};
-
-		spi4: spi@e800e800 {
-			compatible = "renesas,rspi-r7s72100", "renesas,rspi-rz";
-			reg = <0xe800e800 0x24>;
-			interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
-				     <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
-			interrupt-names = "error", "rx", "tx";
-			clocks = <&mstp10_clks R7S72100_CLK_SPI4>;
-			power-domains = <&cpg_clocks>;
-			num-cs = <1>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			status = "disabled";
-		};
-
-		gic: interrupt-controller@e8201000 {
-			compatible = "arm,pl390";
-			#interrupt-cells = <3>;
-			#address-cells = <0>;
-			interrupt-controller;
-			reg = <0xe8201000 0x1000>,
-				<0xe8202000 0x1000>;
-		};
-
-		L2: cache-controller@3ffff000 {
-			compatible = "arm,pl310-cache";
-			reg = <0x3ffff000 0x1000>;
-			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
-			arm,early-bresp-disable;
-			arm,full-line-zero-disable;
-			cache-unified;
-			cache-level = <2>;
-		};
-
-		wdt: watchdog@fcfe0000 {
-			compatible = "renesas,r7s72100-wdt", "renesas,rza-wdt";
-			reg = <0xfcfe0000 0x6>;
-			interrupts = <GIC_SPI 106 IRQ_TYPE_EDGE_RISING>;
-			clocks = <&p0_clk>;
-		};
-
 		i2c0: i2c@fcfee000 {
 			#address-cells = <1>;
 			#size-cells = <0>;
@@ -585,82 +681,6 @@
 			status = "disabled";
 		};
 
-		ether: ethernet@e8203000 {
-			compatible = "renesas,ether-r7s72100";
-			reg = <0xe8203000 0x800>,
-			      <0xe8204800 0x200>;
-			interrupts = <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&mstp7_clks R7S72100_CLK_ETHER>;
-			power-domains = <&cpg_clocks>;
-			phy-mode = "mii";
-			#address-cells = <1>;
-			#size-cells = <0>;
-			status = "disabled";
-		};
-
-		mmcif: mmc@e804c800 {
-			compatible = "renesas,mmcif-r7s72100", "renesas,sh-mmcif";
-			reg = <0xe804c800 0x80>;
-			interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&mstp8_clks R7S72100_CLK_MMCIF>;
-			power-domains = <&cpg_clocks>;
-			reg-io-width = <4>;
-			bus-width = <8>;
-			status = "disabled";
-		};
-
-		sdhi0: sd@e804e000 {
-			compatible = "renesas,sdhi-r7s72100";
-			reg = <0xe804e000 0x100>;
-			interrupts = <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
-
-			clocks = <&mstp12_clks R7S72100_CLK_SDHI00>,
-				 <&mstp12_clks R7S72100_CLK_SDHI01>;
-			clock-names = "core", "cd";
-			power-domains = <&cpg_clocks>;
-			cap-sd-highspeed;
-			cap-sdio-irq;
-			status = "disabled";
-		};
-
-		sdhi1: sd@e804e800 {
-			compatible = "renesas,sdhi-r7s72100";
-			reg = <0xe804e800 0x100>;
-			interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH
-				      GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>;
-
-			clocks = <&mstp12_clks R7S72100_CLK_SDHI10>,
-				 <&mstp12_clks R7S72100_CLK_SDHI11>;
-			clock-names = "core", "cd";
-			power-domains = <&cpg_clocks>;
-			cap-sd-highspeed;
-			cap-sdio-irq;
-			status = "disabled";
-		};
-
-		ostm0: timer@fcfec000 {
-			compatible = "renesas,r7s72100-ostm", "renesas,ostm";
-			reg = <0xfcfec000 0x30>;
-			interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>;
-			clocks = <&mstp5_clks R7S72100_CLK_OSTM0>;
-			power-domains = <&cpg_clocks>;
-			status = "disabled";
-		};
-
-		ostm1: timer@fcfec400 {
-			compatible = "renesas,r7s72100-ostm", "renesas,ostm";
-			reg = <0xfcfec400 0x30>;
-			interrupts = <GIC_SPI 103 IRQ_TYPE_EDGE_RISING>;
-			clocks = <&mstp5_clks R7S72100_CLK_OSTM1>;
-			power-domains = <&cpg_clocks>;
-			status = "disabled";
-		};
-
 		rtc: rtc@fcff1000 {
 			compatible = "renesas,r7s72100-rtc", "renesas,sh-rtc";
 			reg = <0xfcff1000 0x2e>;
@@ -674,25 +694,5 @@
 			power-domains = <&cpg_clocks>;
 			status = "disabled";
 		};
-
-		usbhs0: usb@e8010000 {
-			compatible = "renesas,usbhs-r7s72100", "renesas,rza1-usbhs";
-			reg = <0xe8010000 0x1a0>;
-			interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&mstp7_clks R7S72100_CLK_USB0>;
-			renesas,buswait = <4>;
-			power-domains = <&cpg_clocks>;
-			status = "disabled";
-		};
-
-		usbhs1: usb@e8207000 {
-			compatible = "renesas,usbhs-r7s72100", "renesas,rza1-usbhs";
-			reg = <0xe8207000 0x1a0>;
-			interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&mstp7_clks R7S72100_CLK_USB1>;
-			renesas,buswait = <4>;
-			power-domains = <&cpg_clocks>;
-			status = "disabled";
-		};
 	};
 };