drm/msm/dpu: fix CDP setup to account for multirect index
Client driven prefetch (CDP) is properly setup only for SSPP REC0 currently. Enable client driven prefetch also for SSPP REC1. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Link: https://lore.kernel.org/r/20211201225140.2481577-5-dmitry.baryshkov@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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@ -75,6 +75,7 @@
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#define SSPP_TRAFFIC_SHAPER 0x130
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#define SSPP_CDP_CNTL 0x134
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#define SSPP_UBWC_ERROR_STATUS 0x138
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#define SSPP_CDP_CNTL_REC1 0x13c
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#define SSPP_TRAFFIC_SHAPER_PREFILL 0x150
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#define SSPP_TRAFFIC_SHAPER_REC1_PREFILL 0x154
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#define SSPP_TRAFFIC_SHAPER_REC1 0x158
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@ -624,10 +625,12 @@ static void dpu_hw_sspp_setup_qos_ctrl(struct dpu_hw_pipe *ctx,
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}
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static void dpu_hw_sspp_setup_cdp(struct dpu_hw_pipe *ctx,
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struct dpu_hw_pipe_cdp_cfg *cfg)
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struct dpu_hw_pipe_cdp_cfg *cfg,
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enum dpu_sspp_multirect_index index)
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{
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u32 idx;
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u32 cdp_cntl = 0;
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u32 cdp_cntl_offset = 0;
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if (!ctx || !cfg)
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return;
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@ -635,6 +638,11 @@ static void dpu_hw_sspp_setup_cdp(struct dpu_hw_pipe *ctx,
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if (_sspp_subblk_offset(ctx, DPU_SSPP_SRC, &idx))
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return;
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if (index == DPU_SSPP_RECT_SOLO || index == DPU_SSPP_RECT_0)
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cdp_cntl_offset = SSPP_CDP_CNTL;
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else
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cdp_cntl_offset = SSPP_CDP_CNTL_REC1;
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if (cfg->enable)
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cdp_cntl |= BIT(0);
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if (cfg->ubwc_meta_enable)
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@ -644,7 +652,7 @@ static void dpu_hw_sspp_setup_cdp(struct dpu_hw_pipe *ctx,
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if (cfg->preload_ahead == DPU_SSPP_CDP_PRELOAD_AHEAD_64)
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cdp_cntl |= BIT(3);
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DPU_REG_WRITE(&ctx->hw, SSPP_CDP_CNTL, cdp_cntl);
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DPU_REG_WRITE(&ctx->hw, cdp_cntl_offset, cdp_cntl);
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}
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static void _setup_layer_ops(struct dpu_hw_pipe *c,
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@ -356,9 +356,11 @@ struct dpu_hw_sspp_ops {
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* setup_cdp - setup client driven prefetch
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* @ctx: Pointer to pipe context
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* @cfg: Pointer to cdp configuration
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* @index: rectangle index in multirect
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*/
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void (*setup_cdp)(struct dpu_hw_pipe *ctx,
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struct dpu_hw_pipe_cdp_cfg *cfg);
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struct dpu_hw_pipe_cdp_cfg *cfg,
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enum dpu_sspp_multirect_index index);
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};
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/**
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@ -1191,7 +1191,7 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane)
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DPU_FORMAT_IS_TILE(fmt);
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cdp_cfg.preload_ahead = DPU_SSPP_CDP_PRELOAD_AHEAD_64;
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pdpu->pipe_hw->ops.setup_cdp(pdpu->pipe_hw, &cdp_cfg);
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pdpu->pipe_hw->ops.setup_cdp(pdpu->pipe_hw, &cdp_cfg, pstate->multirect_index);
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}
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}
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