arm64/sysreg: Convert MVFR2_EL1 to automatic generation
Convert MVFR2_EL1 to be automatically generated as per DDI0487I.a, no functional changes. Reviewed-by: Mark Brown <broonie@kernel.org> Signed-off-by: James Morse <james.morse@arm.com> Link: https://lore.kernel.org/r/20221130171637.718182-35-james.morse@arm.com Signed-off-by: Will Deacon <will@kernel.org>
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@ -170,8 +170,6 @@
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#define SYS_ID_AFR0_EL1 sys_reg(3, 0, 0, 1, 3)
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#define SYS_ID_MMFR5_EL1 sys_reg(3, 0, 0, 3, 6)
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#define SYS_MVFR2_EL1 sys_reg(3, 0, 0, 3, 2)
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#define SYS_ACTLR_EL1 sys_reg(3, 0, 1, 0, 1)
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#define SYS_RGSR_EL1 sys_reg(3, 0, 1, 0, 5)
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#define SYS_GCR_EL1 sys_reg(3, 0, 1, 0, 6)
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@ -708,9 +706,6 @@
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#define ID_AA64MMFR0_EL1_TGRAN_2_SHIFT ID_AA64MMFR0_EL1_TGRAN64_2_SHIFT
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#endif
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#define MVFR2_EL1_FPMisc_SHIFT 4
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#define MVFR2_EL1_SIMDMisc_SHIFT 0
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#define CPACR_EL1_FPEN_EL1EN (BIT(20)) /* enable EL1 access */
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#define CPACR_EL1_FPEN_EL0EN (BIT(21)) /* enable EL0 access, if EL1EN set */
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@ -684,6 +684,23 @@ Enum 3:0 FPFtZ
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EndEnum
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EndSysreg
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Sysreg MVFR2_EL1 3 0 0 3 2
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Res0 63:8
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Enum 7:4 FPMisc
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0b0000 NI
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0b0001 FP
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0b0010 FP_DIRECTED_ROUNDING
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0b0011 FP_ROUNDING
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0b0100 FP_MAX_MIN
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EndEnum
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Enum 3:0 SIMDMisc
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0b0000 NI
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0b0001 SIMD_DIRECTED_ROUNDING
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0b0010 SIMD_ROUNDING
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0b0011 SIMD_MAX_MIN
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EndEnum
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EndSysreg
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Sysreg ID_PFR2_EL1 3 0 0 3 4
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Res0 63:12
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Enum 11:8 RAS_frac
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