drm/amdkfd: Move packet writer functions into ASIC-specific file
This is in preparation for GFXv9 (Vega10) which uses incompatible PM4 packet formats from previous ASIC generations. Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
This commit is contained in:
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ef568db792
commit
f6e27ff19d
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@ -196,15 +196,19 @@ static int allocate_vmid(struct device_queue_manager *dqm,
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static int flush_texture_cache_nocpsch(struct kfd_dev *kdev,
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static int flush_texture_cache_nocpsch(struct kfd_dev *kdev,
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struct qcm_process_device *qpd)
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struct qcm_process_device *qpd)
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{
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{
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uint32_t len;
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const struct packet_manager_funcs *pmf = qpd->dqm->packets.pmf;
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int ret;
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if (!qpd->ib_kaddr)
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if (!qpd->ib_kaddr)
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return -ENOMEM;
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return -ENOMEM;
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len = pm_create_release_mem(qpd->ib_base, (uint32_t *)qpd->ib_kaddr);
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ret = pmf->release_mem(qpd->ib_base, (uint32_t *)qpd->ib_kaddr);
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if (ret)
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return ret;
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return kdev->kfd2kgd->submit_ib(kdev->kgd, KGD_ENGINE_MEC1, qpd->vmid,
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return kdev->kfd2kgd->submit_ib(kdev->kgd, KGD_ENGINE_MEC1, qpd->vmid,
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qpd->ib_base, (uint32_t *)qpd->ib_kaddr, len);
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qpd->ib_base, (uint32_t *)qpd->ib_kaddr,
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pmf->release_mem_size / sizeof(uint32_t));
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}
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}
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static void deallocate_vmid(struct device_queue_manager *dqm,
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static void deallocate_vmid(struct device_queue_manager *dqm,
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@ -22,6 +22,9 @@
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*/
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*/
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#include "kfd_kernel_queue.h"
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#include "kfd_kernel_queue.h"
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#include "kfd_device_queue_manager.h"
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#include "kfd_pm4_headers_vi.h"
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#include "kfd_pm4_opcodes.h"
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static bool initialize_vi(struct kernel_queue *kq, struct kfd_dev *dev,
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static bool initialize_vi(struct kernel_queue *kq, struct kfd_dev *dev,
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enum kfd_queue_type type, unsigned int queue_size);
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enum kfd_queue_type type, unsigned int queue_size);
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@ -54,3 +57,310 @@ static void uninitialize_vi(struct kernel_queue *kq)
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{
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{
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kfd_gtt_sa_free(kq->dev, kq->eop_mem);
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kfd_gtt_sa_free(kq->dev, kq->eop_mem);
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}
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}
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static unsigned int build_pm4_header(unsigned int opcode, size_t packet_size)
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{
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union PM4_MES_TYPE_3_HEADER header;
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header.u32All = 0;
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header.opcode = opcode;
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header.count = packet_size / 4 - 2;
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header.type = PM4_TYPE_3;
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return header.u32All;
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}
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static int pm_map_process_vi(struct packet_manager *pm, uint32_t *buffer,
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struct qcm_process_device *qpd)
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{
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struct pm4_mes_map_process *packet;
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packet = (struct pm4_mes_map_process *)buffer;
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memset(buffer, 0, sizeof(struct pm4_mes_map_process));
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packet->header.u32All = build_pm4_header(IT_MAP_PROCESS,
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sizeof(struct pm4_mes_map_process));
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packet->bitfields2.diq_enable = (qpd->is_debug) ? 1 : 0;
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packet->bitfields2.process_quantum = 1;
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packet->bitfields2.pasid = qpd->pqm->process->pasid;
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packet->bitfields3.page_table_base = qpd->page_table_base;
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packet->bitfields10.gds_size = qpd->gds_size;
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packet->bitfields10.num_gws = qpd->num_gws;
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packet->bitfields10.num_oac = qpd->num_oac;
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packet->bitfields10.num_queues = (qpd->is_debug) ? 0 : qpd->queue_count;
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packet->sh_mem_config = qpd->sh_mem_config;
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packet->sh_mem_bases = qpd->sh_mem_bases;
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packet->sh_mem_ape1_base = qpd->sh_mem_ape1_base;
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packet->sh_mem_ape1_limit = qpd->sh_mem_ape1_limit;
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packet->sh_hidden_private_base_vmid = qpd->sh_hidden_private_base;
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packet->gds_addr_lo = lower_32_bits(qpd->gds_context_area);
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packet->gds_addr_hi = upper_32_bits(qpd->gds_context_area);
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return 0;
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}
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static int pm_runlist_vi(struct packet_manager *pm, uint32_t *buffer,
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uint64_t ib, size_t ib_size_in_dwords, bool chain)
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{
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struct pm4_mes_runlist *packet;
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int concurrent_proc_cnt = 0;
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struct kfd_dev *kfd = pm->dqm->dev;
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if (WARN_ON(!ib))
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return -EFAULT;
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/* Determine the number of processes to map together to HW:
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* it can not exceed the number of VMIDs available to the
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* scheduler, and it is determined by the smaller of the number
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* of processes in the runlist and kfd module parameter
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* hws_max_conc_proc.
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* Note: the arbitration between the number of VMIDs and
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* hws_max_conc_proc has been done in
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* kgd2kfd_device_init().
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*/
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concurrent_proc_cnt = min(pm->dqm->processes_count,
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kfd->max_proc_per_quantum);
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packet = (struct pm4_mes_runlist *)buffer;
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memset(buffer, 0, sizeof(struct pm4_mes_runlist));
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packet->header.u32All = build_pm4_header(IT_RUN_LIST,
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sizeof(struct pm4_mes_runlist));
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packet->bitfields4.ib_size = ib_size_in_dwords;
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packet->bitfields4.chain = chain ? 1 : 0;
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packet->bitfields4.offload_polling = 0;
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packet->bitfields4.valid = 1;
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packet->bitfields4.process_cnt = concurrent_proc_cnt;
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packet->ordinal2 = lower_32_bits(ib);
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packet->bitfields3.ib_base_hi = upper_32_bits(ib);
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return 0;
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}
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static int pm_set_resources_vi(struct packet_manager *pm, uint32_t *buffer,
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struct scheduling_resources *res)
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{
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struct pm4_mes_set_resources *packet;
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packet = (struct pm4_mes_set_resources *)buffer;
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memset(buffer, 0, sizeof(struct pm4_mes_set_resources));
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packet->header.u32All = build_pm4_header(IT_SET_RESOURCES,
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sizeof(struct pm4_mes_set_resources));
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packet->bitfields2.queue_type =
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queue_type__mes_set_resources__hsa_interface_queue_hiq;
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packet->bitfields2.vmid_mask = res->vmid_mask;
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packet->bitfields2.unmap_latency = KFD_UNMAP_LATENCY_MS / 100;
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packet->bitfields7.oac_mask = res->oac_mask;
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packet->bitfields8.gds_heap_base = res->gds_heap_base;
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packet->bitfields8.gds_heap_size = res->gds_heap_size;
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packet->gws_mask_lo = lower_32_bits(res->gws_mask);
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packet->gws_mask_hi = upper_32_bits(res->gws_mask);
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packet->queue_mask_lo = lower_32_bits(res->queue_mask);
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packet->queue_mask_hi = upper_32_bits(res->queue_mask);
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return 0;
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}
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static int pm_map_queues_vi(struct packet_manager *pm, uint32_t *buffer,
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struct queue *q, bool is_static)
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{
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struct pm4_mes_map_queues *packet;
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bool use_static = is_static;
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packet = (struct pm4_mes_map_queues *)buffer;
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memset(buffer, 0, sizeof(struct pm4_mes_map_queues));
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packet->header.u32All = build_pm4_header(IT_MAP_QUEUES,
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sizeof(struct pm4_mes_map_queues));
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packet->bitfields2.alloc_format =
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alloc_format__mes_map_queues__one_per_pipe_vi;
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packet->bitfields2.num_queues = 1;
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packet->bitfields2.queue_sel =
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queue_sel__mes_map_queues__map_to_hws_determined_queue_slots_vi;
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packet->bitfields2.engine_sel =
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engine_sel__mes_map_queues__compute_vi;
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packet->bitfields2.queue_type =
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queue_type__mes_map_queues__normal_compute_vi;
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switch (q->properties.type) {
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case KFD_QUEUE_TYPE_COMPUTE:
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if (use_static)
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packet->bitfields2.queue_type =
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queue_type__mes_map_queues__normal_latency_static_queue_vi;
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break;
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case KFD_QUEUE_TYPE_DIQ:
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packet->bitfields2.queue_type =
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queue_type__mes_map_queues__debug_interface_queue_vi;
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break;
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case KFD_QUEUE_TYPE_SDMA:
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packet->bitfields2.engine_sel = q->properties.sdma_engine_id +
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engine_sel__mes_map_queues__sdma0_vi;
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use_static = false; /* no static queues under SDMA */
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break;
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default:
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WARN(1, "queue type %d", q->properties.type);
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return -EINVAL;
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}
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packet->bitfields3.doorbell_offset =
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q->properties.doorbell_off;
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packet->mqd_addr_lo =
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lower_32_bits(q->gart_mqd_addr);
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packet->mqd_addr_hi =
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upper_32_bits(q->gart_mqd_addr);
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packet->wptr_addr_lo =
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lower_32_bits((uint64_t)q->properties.write_ptr);
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packet->wptr_addr_hi =
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upper_32_bits((uint64_t)q->properties.write_ptr);
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return 0;
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}
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static int pm_unmap_queues_vi(struct packet_manager *pm, uint32_t *buffer,
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enum kfd_queue_type type,
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enum kfd_unmap_queues_filter filter,
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uint32_t filter_param, bool reset,
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unsigned int sdma_engine)
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{
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struct pm4_mes_unmap_queues *packet;
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packet = (struct pm4_mes_unmap_queues *)buffer;
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memset(buffer, 0, sizeof(struct pm4_mes_unmap_queues));
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packet->header.u32All = build_pm4_header(IT_UNMAP_QUEUES,
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sizeof(struct pm4_mes_unmap_queues));
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switch (type) {
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case KFD_QUEUE_TYPE_COMPUTE:
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case KFD_QUEUE_TYPE_DIQ:
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packet->bitfields2.engine_sel =
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engine_sel__mes_unmap_queues__compute;
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break;
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case KFD_QUEUE_TYPE_SDMA:
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packet->bitfields2.engine_sel =
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engine_sel__mes_unmap_queues__sdma0 + sdma_engine;
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break;
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default:
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WARN(1, "queue type %d", type);
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return -EINVAL;
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}
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if (reset)
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packet->bitfields2.action =
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action__mes_unmap_queues__reset_queues;
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else
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packet->bitfields2.action =
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action__mes_unmap_queues__preempt_queues;
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switch (filter) {
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case KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE:
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packet->bitfields2.queue_sel =
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queue_sel__mes_unmap_queues__perform_request_on_specified_queues;
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packet->bitfields2.num_queues = 1;
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packet->bitfields3b.doorbell_offset0 = filter_param;
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break;
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case KFD_UNMAP_QUEUES_FILTER_BY_PASID:
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packet->bitfields2.queue_sel =
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queue_sel__mes_unmap_queues__perform_request_on_pasid_queues;
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packet->bitfields3a.pasid = filter_param;
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break;
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case KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES:
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packet->bitfields2.queue_sel =
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queue_sel__mes_unmap_queues__unmap_all_queues;
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break;
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case KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES:
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/* in this case, we do not preempt static queues */
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packet->bitfields2.queue_sel =
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queue_sel__mes_unmap_queues__unmap_all_non_static_queues;
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break;
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default:
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WARN(1, "filter %d", filter);
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return -EINVAL;
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}
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return 0;
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}
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static int pm_query_status_vi(struct packet_manager *pm, uint32_t *buffer,
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uint64_t fence_address, uint32_t fence_value)
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{
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struct pm4_mes_query_status *packet;
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packet = (struct pm4_mes_query_status *)buffer;
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memset(buffer, 0, sizeof(struct pm4_mes_query_status));
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packet->header.u32All = build_pm4_header(IT_QUERY_STATUS,
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sizeof(struct pm4_mes_query_status));
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packet->bitfields2.context_id = 0;
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packet->bitfields2.interrupt_sel =
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interrupt_sel__mes_query_status__completion_status;
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packet->bitfields2.command =
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command__mes_query_status__fence_only_after_write_ack;
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packet->addr_hi = upper_32_bits((uint64_t)fence_address);
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packet->addr_lo = lower_32_bits((uint64_t)fence_address);
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packet->data_hi = upper_32_bits((uint64_t)fence_value);
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packet->data_lo = lower_32_bits((uint64_t)fence_value);
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return 0;
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}
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static int pm_release_mem_vi(uint64_t gpu_addr, uint32_t *buffer)
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{
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struct pm4_mec_release_mem *packet;
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packet = (struct pm4_mec_release_mem *)buffer;
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memset(buffer, 0, sizeof(*packet));
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packet->header.u32All = build_pm4_header(IT_RELEASE_MEM,
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sizeof(*packet));
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packet->bitfields2.event_type = CACHE_FLUSH_AND_INV_TS_EVENT;
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packet->bitfields2.event_index = event_index___release_mem__end_of_pipe;
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packet->bitfields2.tcl1_action_ena = 1;
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packet->bitfields2.tc_action_ena = 1;
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packet->bitfields2.cache_policy = cache_policy___release_mem__lru;
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packet->bitfields2.atc = 0;
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packet->bitfields3.data_sel = data_sel___release_mem__send_32_bit_low;
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packet->bitfields3.int_sel =
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int_sel___release_mem__send_interrupt_after_write_confirm;
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packet->bitfields4.address_lo_32b = (gpu_addr & 0xffffffff) >> 2;
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packet->address_hi = upper_32_bits(gpu_addr);
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packet->data_lo = 0;
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return 0;
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}
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const struct packet_manager_funcs kfd_vi_pm_funcs = {
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.map_process = pm_map_process_vi,
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.runlist = pm_runlist_vi,
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.set_resources = pm_set_resources_vi,
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.map_queues = pm_map_queues_vi,
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.unmap_queues = pm_unmap_queues_vi,
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.query_status = pm_query_status_vi,
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|
.release_mem = pm_release_mem_vi,
|
||||||
|
.map_process_size = sizeof(struct pm4_mes_map_process),
|
||||||
|
.runlist_size = sizeof(struct pm4_mes_runlist),
|
||||||
|
.set_resources_size = sizeof(struct pm4_mes_set_resources),
|
||||||
|
.map_queues_size = sizeof(struct pm4_mes_map_queues),
|
||||||
|
.unmap_queues_size = sizeof(struct pm4_mes_unmap_queues),
|
||||||
|
.query_status_size = sizeof(struct pm4_mes_query_status),
|
||||||
|
.release_mem_size = sizeof(struct pm4_mec_release_mem)
|
||||||
|
};
|
||||||
|
|
|
@ -26,8 +26,6 @@
|
||||||
#include "kfd_device_queue_manager.h"
|
#include "kfd_device_queue_manager.h"
|
||||||
#include "kfd_kernel_queue.h"
|
#include "kfd_kernel_queue.h"
|
||||||
#include "kfd_priv.h"
|
#include "kfd_priv.h"
|
||||||
#include "kfd_pm4_headers_vi.h"
|
|
||||||
#include "kfd_pm4_opcodes.h"
|
|
||||||
|
|
||||||
static inline void inc_wptr(unsigned int *wptr, unsigned int increment_bytes,
|
static inline void inc_wptr(unsigned int *wptr, unsigned int increment_bytes,
|
||||||
unsigned int buffer_size_bytes)
|
unsigned int buffer_size_bytes)
|
||||||
|
@ -39,18 +37,6 @@ static inline void inc_wptr(unsigned int *wptr, unsigned int increment_bytes,
|
||||||
*wptr = temp;
|
*wptr = temp;
|
||||||
}
|
}
|
||||||
|
|
||||||
static unsigned int build_pm4_header(unsigned int opcode, size_t packet_size)
|
|
||||||
{
|
|
||||||
union PM4_MES_TYPE_3_HEADER header;
|
|
||||||
|
|
||||||
header.u32All = 0;
|
|
||||||
header.opcode = opcode;
|
|
||||||
header.count = packet_size / 4 - 2;
|
|
||||||
header.type = PM4_TYPE_3;
|
|
||||||
|
|
||||||
return header.u32All;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void pm_calc_rlib_size(struct packet_manager *pm,
|
static void pm_calc_rlib_size(struct packet_manager *pm,
|
||||||
unsigned int *rlib_size,
|
unsigned int *rlib_size,
|
||||||
bool *over_subscription)
|
bool *over_subscription)
|
||||||
|
@ -80,9 +66,9 @@ static void pm_calc_rlib_size(struct packet_manager *pm,
|
||||||
pr_debug("Over subscribed runlist\n");
|
pr_debug("Over subscribed runlist\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
map_queue_size = sizeof(struct pm4_mes_map_queues);
|
map_queue_size = pm->pmf->map_queues_size;
|
||||||
/* calculate run list ib allocation size */
|
/* calculate run list ib allocation size */
|
||||||
*rlib_size = process_count * sizeof(struct pm4_mes_map_process) +
|
*rlib_size = process_count * pm->pmf->map_process_size +
|
||||||
queue_count * map_queue_size;
|
queue_count * map_queue_size;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
@ -90,7 +76,7 @@ static void pm_calc_rlib_size(struct packet_manager *pm,
|
||||||
* when over subscription
|
* when over subscription
|
||||||
*/
|
*/
|
||||||
if (*over_subscription)
|
if (*over_subscription)
|
||||||
*rlib_size += sizeof(struct pm4_mes_runlist);
|
*rlib_size += pm->pmf->runlist_size;
|
||||||
|
|
||||||
pr_debug("runlist ib size %d\n", *rlib_size);
|
pr_debug("runlist ib size %d\n", *rlib_size);
|
||||||
}
|
}
|
||||||
|
@ -124,137 +110,6 @@ static int pm_allocate_runlist_ib(struct packet_manager *pm,
|
||||||
return retval;
|
return retval;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int pm_create_runlist(struct packet_manager *pm, uint32_t *buffer,
|
|
||||||
uint64_t ib, size_t ib_size_in_dwords, bool chain)
|
|
||||||
{
|
|
||||||
struct pm4_mes_runlist *packet;
|
|
||||||
int concurrent_proc_cnt = 0;
|
|
||||||
struct kfd_dev *kfd = pm->dqm->dev;
|
|
||||||
|
|
||||||
if (WARN_ON(!ib))
|
|
||||||
return -EFAULT;
|
|
||||||
|
|
||||||
/* Determine the number of processes to map together to HW:
|
|
||||||
* it can not exceed the number of VMIDs available to the
|
|
||||||
* scheduler, and it is determined by the smaller of the number
|
|
||||||
* of processes in the runlist and kfd module parameter
|
|
||||||
* hws_max_conc_proc.
|
|
||||||
* Note: the arbitration between the number of VMIDs and
|
|
||||||
* hws_max_conc_proc has been done in
|
|
||||||
* kgd2kfd_device_init().
|
|
||||||
*/
|
|
||||||
concurrent_proc_cnt = min(pm->dqm->processes_count,
|
|
||||||
kfd->max_proc_per_quantum);
|
|
||||||
|
|
||||||
packet = (struct pm4_mes_runlist *)buffer;
|
|
||||||
|
|
||||||
memset(buffer, 0, sizeof(struct pm4_mes_runlist));
|
|
||||||
packet->header.u32All = build_pm4_header(IT_RUN_LIST,
|
|
||||||
sizeof(struct pm4_mes_runlist));
|
|
||||||
|
|
||||||
packet->bitfields4.ib_size = ib_size_in_dwords;
|
|
||||||
packet->bitfields4.chain = chain ? 1 : 0;
|
|
||||||
packet->bitfields4.offload_polling = 0;
|
|
||||||
packet->bitfields4.valid = 1;
|
|
||||||
packet->bitfields4.process_cnt = concurrent_proc_cnt;
|
|
||||||
packet->ordinal2 = lower_32_bits(ib);
|
|
||||||
packet->bitfields3.ib_base_hi = upper_32_bits(ib);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int pm_create_map_process(struct packet_manager *pm, uint32_t *buffer,
|
|
||||||
struct qcm_process_device *qpd)
|
|
||||||
{
|
|
||||||
struct pm4_mes_map_process *packet;
|
|
||||||
|
|
||||||
packet = (struct pm4_mes_map_process *)buffer;
|
|
||||||
|
|
||||||
memset(buffer, 0, sizeof(struct pm4_mes_map_process));
|
|
||||||
|
|
||||||
packet->header.u32All = build_pm4_header(IT_MAP_PROCESS,
|
|
||||||
sizeof(struct pm4_mes_map_process));
|
|
||||||
packet->bitfields2.diq_enable = (qpd->is_debug) ? 1 : 0;
|
|
||||||
packet->bitfields2.process_quantum = 1;
|
|
||||||
packet->bitfields2.pasid = qpd->pqm->process->pasid;
|
|
||||||
packet->bitfields3.page_table_base = qpd->page_table_base;
|
|
||||||
packet->bitfields10.gds_size = qpd->gds_size;
|
|
||||||
packet->bitfields10.num_gws = qpd->num_gws;
|
|
||||||
packet->bitfields10.num_oac = qpd->num_oac;
|
|
||||||
packet->bitfields10.num_queues = (qpd->is_debug) ? 0 : qpd->queue_count;
|
|
||||||
|
|
||||||
packet->sh_mem_config = qpd->sh_mem_config;
|
|
||||||
packet->sh_mem_bases = qpd->sh_mem_bases;
|
|
||||||
packet->sh_mem_ape1_base = qpd->sh_mem_ape1_base;
|
|
||||||
packet->sh_mem_ape1_limit = qpd->sh_mem_ape1_limit;
|
|
||||||
|
|
||||||
packet->sh_hidden_private_base_vmid = qpd->sh_hidden_private_base;
|
|
||||||
|
|
||||||
packet->gds_addr_lo = lower_32_bits(qpd->gds_context_area);
|
|
||||||
packet->gds_addr_hi = upper_32_bits(qpd->gds_context_area);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int pm_create_map_queue(struct packet_manager *pm, uint32_t *buffer,
|
|
||||||
struct queue *q, bool is_static)
|
|
||||||
{
|
|
||||||
struct pm4_mes_map_queues *packet;
|
|
||||||
bool use_static = is_static;
|
|
||||||
|
|
||||||
packet = (struct pm4_mes_map_queues *)buffer;
|
|
||||||
memset(buffer, 0, sizeof(struct pm4_mes_map_queues));
|
|
||||||
|
|
||||||
packet->header.u32All = build_pm4_header(IT_MAP_QUEUES,
|
|
||||||
sizeof(struct pm4_mes_map_queues));
|
|
||||||
packet->bitfields2.alloc_format =
|
|
||||||
alloc_format__mes_map_queues__one_per_pipe_vi;
|
|
||||||
packet->bitfields2.num_queues = 1;
|
|
||||||
packet->bitfields2.queue_sel =
|
|
||||||
queue_sel__mes_map_queues__map_to_hws_determined_queue_slots_vi;
|
|
||||||
|
|
||||||
packet->bitfields2.engine_sel =
|
|
||||||
engine_sel__mes_map_queues__compute_vi;
|
|
||||||
packet->bitfields2.queue_type =
|
|
||||||
queue_type__mes_map_queues__normal_compute_vi;
|
|
||||||
|
|
||||||
switch (q->properties.type) {
|
|
||||||
case KFD_QUEUE_TYPE_COMPUTE:
|
|
||||||
if (use_static)
|
|
||||||
packet->bitfields2.queue_type =
|
|
||||||
queue_type__mes_map_queues__normal_latency_static_queue_vi;
|
|
||||||
break;
|
|
||||||
case KFD_QUEUE_TYPE_DIQ:
|
|
||||||
packet->bitfields2.queue_type =
|
|
||||||
queue_type__mes_map_queues__debug_interface_queue_vi;
|
|
||||||
break;
|
|
||||||
case KFD_QUEUE_TYPE_SDMA:
|
|
||||||
packet->bitfields2.engine_sel = q->properties.sdma_engine_id +
|
|
||||||
engine_sel__mes_map_queues__sdma0_vi;
|
|
||||||
use_static = false; /* no static queues under SDMA */
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
WARN(1, "queue type %d", q->properties.type);
|
|
||||||
return -EINVAL;
|
|
||||||
}
|
|
||||||
packet->bitfields3.doorbell_offset =
|
|
||||||
q->properties.doorbell_off;
|
|
||||||
|
|
||||||
packet->mqd_addr_lo =
|
|
||||||
lower_32_bits(q->gart_mqd_addr);
|
|
||||||
|
|
||||||
packet->mqd_addr_hi =
|
|
||||||
upper_32_bits(q->gart_mqd_addr);
|
|
||||||
|
|
||||||
packet->wptr_addr_lo =
|
|
||||||
lower_32_bits((uint64_t)q->properties.write_ptr);
|
|
||||||
|
|
||||||
packet->wptr_addr_hi =
|
|
||||||
upper_32_bits((uint64_t)q->properties.write_ptr);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int pm_create_runlist_ib(struct packet_manager *pm,
|
static int pm_create_runlist_ib(struct packet_manager *pm,
|
||||||
struct list_head *queues,
|
struct list_head *queues,
|
||||||
uint64_t *rl_gpu_addr,
|
uint64_t *rl_gpu_addr,
|
||||||
|
@ -292,12 +147,12 @@ static int pm_create_runlist_ib(struct packet_manager *pm,
|
||||||
return -ENOMEM;
|
return -ENOMEM;
|
||||||
}
|
}
|
||||||
|
|
||||||
retval = pm_create_map_process(pm, &rl_buffer[rl_wptr], qpd);
|
retval = pm->pmf->map_process(pm, &rl_buffer[rl_wptr], qpd);
|
||||||
if (retval)
|
if (retval)
|
||||||
return retval;
|
return retval;
|
||||||
|
|
||||||
proccesses_mapped++;
|
proccesses_mapped++;
|
||||||
inc_wptr(&rl_wptr, sizeof(struct pm4_mes_map_process),
|
inc_wptr(&rl_wptr, pm->pmf->map_process_size,
|
||||||
alloc_size_bytes);
|
alloc_size_bytes);
|
||||||
|
|
||||||
list_for_each_entry(kq, &qpd->priv_queue_list, list) {
|
list_for_each_entry(kq, &qpd->priv_queue_list, list) {
|
||||||
|
@ -307,7 +162,7 @@ static int pm_create_runlist_ib(struct packet_manager *pm,
|
||||||
pr_debug("static_queue, mapping kernel q %d, is debug status %d\n",
|
pr_debug("static_queue, mapping kernel q %d, is debug status %d\n",
|
||||||
kq->queue->queue, qpd->is_debug);
|
kq->queue->queue, qpd->is_debug);
|
||||||
|
|
||||||
retval = pm_create_map_queue(pm,
|
retval = pm->pmf->map_queues(pm,
|
||||||
&rl_buffer[rl_wptr],
|
&rl_buffer[rl_wptr],
|
||||||
kq->queue,
|
kq->queue,
|
||||||
qpd->is_debug);
|
qpd->is_debug);
|
||||||
|
@ -315,7 +170,7 @@ static int pm_create_runlist_ib(struct packet_manager *pm,
|
||||||
return retval;
|
return retval;
|
||||||
|
|
||||||
inc_wptr(&rl_wptr,
|
inc_wptr(&rl_wptr,
|
||||||
sizeof(struct pm4_mes_map_queues),
|
pm->pmf->map_queues_size,
|
||||||
alloc_size_bytes);
|
alloc_size_bytes);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -326,7 +181,7 @@ static int pm_create_runlist_ib(struct packet_manager *pm,
|
||||||
pr_debug("static_queue, mapping user queue %d, is debug status %d\n",
|
pr_debug("static_queue, mapping user queue %d, is debug status %d\n",
|
||||||
q->queue, qpd->is_debug);
|
q->queue, qpd->is_debug);
|
||||||
|
|
||||||
retval = pm_create_map_queue(pm,
|
retval = pm->pmf->map_queues(pm,
|
||||||
&rl_buffer[rl_wptr],
|
&rl_buffer[rl_wptr],
|
||||||
q,
|
q,
|
||||||
qpd->is_debug);
|
qpd->is_debug);
|
||||||
|
@ -335,7 +190,7 @@ static int pm_create_runlist_ib(struct packet_manager *pm,
|
||||||
return retval;
|
return retval;
|
||||||
|
|
||||||
inc_wptr(&rl_wptr,
|
inc_wptr(&rl_wptr,
|
||||||
sizeof(struct pm4_mes_map_queues),
|
pm->pmf->map_queues_size,
|
||||||
alloc_size_bytes);
|
alloc_size_bytes);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -343,7 +198,7 @@ static int pm_create_runlist_ib(struct packet_manager *pm,
|
||||||
pr_debug("Finished map process and queues to runlist\n");
|
pr_debug("Finished map process and queues to runlist\n");
|
||||||
|
|
||||||
if (is_over_subscription)
|
if (is_over_subscription)
|
||||||
retval = pm_create_runlist(pm, &rl_buffer[rl_wptr],
|
retval = pm->pmf->runlist(pm, &rl_buffer[rl_wptr],
|
||||||
*rl_gpu_addr,
|
*rl_gpu_addr,
|
||||||
alloc_size_bytes / sizeof(uint32_t),
|
alloc_size_bytes / sizeof(uint32_t),
|
||||||
true);
|
true);
|
||||||
|
@ -355,45 +210,25 @@ static int pm_create_runlist_ib(struct packet_manager *pm,
|
||||||
return retval;
|
return retval;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* pm_create_release_mem - Create a RELEASE_MEM packet and return the size
|
|
||||||
* of this packet
|
|
||||||
* @gpu_addr - GPU address of the packet. It's a virtual address.
|
|
||||||
* @buffer - buffer to fill up with the packet. It's a CPU kernel pointer
|
|
||||||
* Return - length of the packet
|
|
||||||
*/
|
|
||||||
uint32_t pm_create_release_mem(uint64_t gpu_addr, uint32_t *buffer)
|
|
||||||
{
|
|
||||||
struct pm4_mec_release_mem *packet;
|
|
||||||
|
|
||||||
WARN_ON(!buffer);
|
|
||||||
|
|
||||||
packet = (struct pm4_mec_release_mem *)buffer;
|
|
||||||
memset(buffer, 0, sizeof(*packet));
|
|
||||||
|
|
||||||
packet->header.u32All = build_pm4_header(IT_RELEASE_MEM,
|
|
||||||
sizeof(*packet));
|
|
||||||
|
|
||||||
packet->bitfields2.event_type = CACHE_FLUSH_AND_INV_TS_EVENT;
|
|
||||||
packet->bitfields2.event_index = event_index___release_mem__end_of_pipe;
|
|
||||||
packet->bitfields2.tcl1_action_ena = 1;
|
|
||||||
packet->bitfields2.tc_action_ena = 1;
|
|
||||||
packet->bitfields2.cache_policy = cache_policy___release_mem__lru;
|
|
||||||
packet->bitfields2.atc = 0;
|
|
||||||
|
|
||||||
packet->bitfields3.data_sel = data_sel___release_mem__send_32_bit_low;
|
|
||||||
packet->bitfields3.int_sel =
|
|
||||||
int_sel___release_mem__send_interrupt_after_write_confirm;
|
|
||||||
|
|
||||||
packet->bitfields4.address_lo_32b = (gpu_addr & 0xffffffff) >> 2;
|
|
||||||
packet->address_hi = upper_32_bits(gpu_addr);
|
|
||||||
|
|
||||||
packet->data_lo = 0;
|
|
||||||
|
|
||||||
return sizeof(*packet) / sizeof(unsigned int);
|
|
||||||
}
|
|
||||||
|
|
||||||
int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm)
|
int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm)
|
||||||
{
|
{
|
||||||
|
switch (dqm->dev->device_info->asic_family) {
|
||||||
|
case CHIP_KAVERI:
|
||||||
|
case CHIP_HAWAII:
|
||||||
|
/* PM4 packet structures on CIK are the same as on VI */
|
||||||
|
case CHIP_CARRIZO:
|
||||||
|
case CHIP_TONGA:
|
||||||
|
case CHIP_FIJI:
|
||||||
|
case CHIP_POLARIS10:
|
||||||
|
case CHIP_POLARIS11:
|
||||||
|
pm->pmf = &kfd_vi_pm_funcs;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
WARN(1, "Unexpected ASIC family %u",
|
||||||
|
dqm->dev->device_info->asic_family);
|
||||||
|
return -EINVAL;
|
||||||
|
}
|
||||||
|
|
||||||
pm->dqm = dqm;
|
pm->dqm = dqm;
|
||||||
mutex_init(&pm->lock);
|
mutex_init(&pm->lock);
|
||||||
pm->priv_queue = kernel_queue_init(dqm->dev, KFD_QUEUE_TYPE_HIQ);
|
pm->priv_queue = kernel_queue_init(dqm->dev, KFD_QUEUE_TYPE_HIQ);
|
||||||
|
@ -415,38 +250,25 @@ void pm_uninit(struct packet_manager *pm)
|
||||||
int pm_send_set_resources(struct packet_manager *pm,
|
int pm_send_set_resources(struct packet_manager *pm,
|
||||||
struct scheduling_resources *res)
|
struct scheduling_resources *res)
|
||||||
{
|
{
|
||||||
struct pm4_mes_set_resources *packet;
|
uint32_t *buffer, size;
|
||||||
int retval = 0;
|
int retval = 0;
|
||||||
|
|
||||||
|
size = pm->pmf->set_resources_size;
|
||||||
mutex_lock(&pm->lock);
|
mutex_lock(&pm->lock);
|
||||||
pm->priv_queue->ops.acquire_packet_buffer(pm->priv_queue,
|
pm->priv_queue->ops.acquire_packet_buffer(pm->priv_queue,
|
||||||
sizeof(*packet) / sizeof(uint32_t),
|
size / sizeof(uint32_t),
|
||||||
(unsigned int **)&packet);
|
(unsigned int **)&buffer);
|
||||||
if (!packet) {
|
if (!buffer) {
|
||||||
pr_err("Failed to allocate buffer on kernel queue\n");
|
pr_err("Failed to allocate buffer on kernel queue\n");
|
||||||
retval = -ENOMEM;
|
retval = -ENOMEM;
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
memset(packet, 0, sizeof(struct pm4_mes_set_resources));
|
retval = pm->pmf->set_resources(pm, buffer, res);
|
||||||
packet->header.u32All = build_pm4_header(IT_SET_RESOURCES,
|
if (!retval)
|
||||||
sizeof(struct pm4_mes_set_resources));
|
pm->priv_queue->ops.submit_packet(pm->priv_queue);
|
||||||
|
else
|
||||||
packet->bitfields2.queue_type =
|
pm->priv_queue->ops.rollback_packet(pm->priv_queue);
|
||||||
queue_type__mes_set_resources__hsa_interface_queue_hiq;
|
|
||||||
packet->bitfields2.vmid_mask = res->vmid_mask;
|
|
||||||
packet->bitfields2.unmap_latency = KFD_UNMAP_LATENCY_MS / 100;
|
|
||||||
packet->bitfields7.oac_mask = res->oac_mask;
|
|
||||||
packet->bitfields8.gds_heap_base = res->gds_heap_base;
|
|
||||||
packet->bitfields8.gds_heap_size = res->gds_heap_size;
|
|
||||||
|
|
||||||
packet->gws_mask_lo = lower_32_bits(res->gws_mask);
|
|
||||||
packet->gws_mask_hi = upper_32_bits(res->gws_mask);
|
|
||||||
|
|
||||||
packet->queue_mask_lo = lower_32_bits(res->queue_mask);
|
|
||||||
packet->queue_mask_hi = upper_32_bits(res->queue_mask);
|
|
||||||
|
|
||||||
pm->priv_queue->ops.submit_packet(pm->priv_queue);
|
|
||||||
|
|
||||||
out:
|
out:
|
||||||
mutex_unlock(&pm->lock);
|
mutex_unlock(&pm->lock);
|
||||||
|
@ -468,7 +290,7 @@ int pm_send_runlist(struct packet_manager *pm, struct list_head *dqm_queues)
|
||||||
|
|
||||||
pr_debug("runlist IB address: 0x%llX\n", rl_gpu_ib_addr);
|
pr_debug("runlist IB address: 0x%llX\n", rl_gpu_ib_addr);
|
||||||
|
|
||||||
packet_size_dwords = sizeof(struct pm4_mes_runlist) / sizeof(uint32_t);
|
packet_size_dwords = pm->pmf->runlist_size / sizeof(uint32_t);
|
||||||
mutex_lock(&pm->lock);
|
mutex_lock(&pm->lock);
|
||||||
|
|
||||||
retval = pm->priv_queue->ops.acquire_packet_buffer(pm->priv_queue,
|
retval = pm->priv_queue->ops.acquire_packet_buffer(pm->priv_queue,
|
||||||
|
@ -476,7 +298,7 @@ int pm_send_runlist(struct packet_manager *pm, struct list_head *dqm_queues)
|
||||||
if (retval)
|
if (retval)
|
||||||
goto fail_acquire_packet_buffer;
|
goto fail_acquire_packet_buffer;
|
||||||
|
|
||||||
retval = pm_create_runlist(pm, rl_buffer, rl_gpu_ib_addr,
|
retval = pm->pmf->runlist(pm, rl_buffer, rl_gpu_ib_addr,
|
||||||
rl_ib_size / sizeof(uint32_t), false);
|
rl_ib_size / sizeof(uint32_t), false);
|
||||||
if (retval)
|
if (retval)
|
||||||
goto fail_create_runlist;
|
goto fail_create_runlist;
|
||||||
|
@ -499,37 +321,29 @@ fail_create_runlist_ib:
|
||||||
int pm_send_query_status(struct packet_manager *pm, uint64_t fence_address,
|
int pm_send_query_status(struct packet_manager *pm, uint64_t fence_address,
|
||||||
uint32_t fence_value)
|
uint32_t fence_value)
|
||||||
{
|
{
|
||||||
int retval;
|
uint32_t *buffer, size;
|
||||||
struct pm4_mes_query_status *packet;
|
int retval = 0;
|
||||||
|
|
||||||
if (WARN_ON(!fence_address))
|
if (WARN_ON(!fence_address))
|
||||||
return -EFAULT;
|
return -EFAULT;
|
||||||
|
|
||||||
|
size = pm->pmf->query_status_size;
|
||||||
mutex_lock(&pm->lock);
|
mutex_lock(&pm->lock);
|
||||||
retval = pm->priv_queue->ops.acquire_packet_buffer(
|
pm->priv_queue->ops.acquire_packet_buffer(pm->priv_queue,
|
||||||
pm->priv_queue,
|
size / sizeof(uint32_t), (unsigned int **)&buffer);
|
||||||
sizeof(struct pm4_mes_query_status) / sizeof(uint32_t),
|
if (!buffer) {
|
||||||
(unsigned int **)&packet);
|
pr_err("Failed to allocate buffer on kernel queue\n");
|
||||||
if (retval)
|
retval = -ENOMEM;
|
||||||
goto fail_acquire_packet_buffer;
|
goto out;
|
||||||
|
}
|
||||||
|
|
||||||
packet->header.u32All = build_pm4_header(IT_QUERY_STATUS,
|
retval = pm->pmf->query_status(pm, buffer, fence_address, fence_value);
|
||||||
sizeof(struct pm4_mes_query_status));
|
if (!retval)
|
||||||
|
pm->priv_queue->ops.submit_packet(pm->priv_queue);
|
||||||
|
else
|
||||||
|
pm->priv_queue->ops.rollback_packet(pm->priv_queue);
|
||||||
|
|
||||||
packet->bitfields2.context_id = 0;
|
out:
|
||||||
packet->bitfields2.interrupt_sel =
|
|
||||||
interrupt_sel__mes_query_status__completion_status;
|
|
||||||
packet->bitfields2.command =
|
|
||||||
command__mes_query_status__fence_only_after_write_ack;
|
|
||||||
|
|
||||||
packet->addr_hi = upper_32_bits((uint64_t)fence_address);
|
|
||||||
packet->addr_lo = lower_32_bits((uint64_t)fence_address);
|
|
||||||
packet->data_hi = upper_32_bits((uint64_t)fence_value);
|
|
||||||
packet->data_lo = lower_32_bits((uint64_t)fence_value);
|
|
||||||
|
|
||||||
pm->priv_queue->ops.submit_packet(pm->priv_queue);
|
|
||||||
|
|
||||||
fail_acquire_packet_buffer:
|
|
||||||
mutex_unlock(&pm->lock);
|
mutex_unlock(&pm->lock);
|
||||||
return retval;
|
return retval;
|
||||||
}
|
}
|
||||||
|
@ -539,82 +353,27 @@ int pm_send_unmap_queue(struct packet_manager *pm, enum kfd_queue_type type,
|
||||||
uint32_t filter_param, bool reset,
|
uint32_t filter_param, bool reset,
|
||||||
unsigned int sdma_engine)
|
unsigned int sdma_engine)
|
||||||
{
|
{
|
||||||
int retval;
|
uint32_t *buffer, size;
|
||||||
uint32_t *buffer;
|
int retval = 0;
|
||||||
struct pm4_mes_unmap_queues *packet;
|
|
||||||
|
|
||||||
|
size = pm->pmf->unmap_queues_size;
|
||||||
mutex_lock(&pm->lock);
|
mutex_lock(&pm->lock);
|
||||||
retval = pm->priv_queue->ops.acquire_packet_buffer(
|
pm->priv_queue->ops.acquire_packet_buffer(pm->priv_queue,
|
||||||
pm->priv_queue,
|
size / sizeof(uint32_t), (unsigned int **)&buffer);
|
||||||
sizeof(struct pm4_mes_unmap_queues) / sizeof(uint32_t),
|
if (!buffer) {
|
||||||
&buffer);
|
pr_err("Failed to allocate buffer on kernel queue\n");
|
||||||
if (retval)
|
retval = -ENOMEM;
|
||||||
goto err_acquire_packet_buffer;
|
goto out;
|
||||||
|
|
||||||
packet = (struct pm4_mes_unmap_queues *)buffer;
|
|
||||||
memset(buffer, 0, sizeof(struct pm4_mes_unmap_queues));
|
|
||||||
pr_debug("static_queue: unmapping queues: filter is %d , reset is %d , type is %d\n",
|
|
||||||
filter, reset, type);
|
|
||||||
packet->header.u32All = build_pm4_header(IT_UNMAP_QUEUES,
|
|
||||||
sizeof(struct pm4_mes_unmap_queues));
|
|
||||||
switch (type) {
|
|
||||||
case KFD_QUEUE_TYPE_COMPUTE:
|
|
||||||
case KFD_QUEUE_TYPE_DIQ:
|
|
||||||
packet->bitfields2.engine_sel =
|
|
||||||
engine_sel__mes_unmap_queues__compute;
|
|
||||||
break;
|
|
||||||
case KFD_QUEUE_TYPE_SDMA:
|
|
||||||
packet->bitfields2.engine_sel =
|
|
||||||
engine_sel__mes_unmap_queues__sdma0 + sdma_engine;
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
WARN(1, "queue type %d", type);
|
|
||||||
retval = -EINVAL;
|
|
||||||
goto err_invalid;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
if (reset)
|
retval = pm->pmf->unmap_queues(pm, buffer, type, filter, filter_param,
|
||||||
packet->bitfields2.action =
|
reset, sdma_engine);
|
||||||
action__mes_unmap_queues__reset_queues;
|
if (!retval)
|
||||||
|
pm->priv_queue->ops.submit_packet(pm->priv_queue);
|
||||||
else
|
else
|
||||||
packet->bitfields2.action =
|
pm->priv_queue->ops.rollback_packet(pm->priv_queue);
|
||||||
action__mes_unmap_queues__preempt_queues;
|
|
||||||
|
|
||||||
switch (filter) {
|
out:
|
||||||
case KFD_UNMAP_QUEUES_FILTER_SINGLE_QUEUE:
|
|
||||||
packet->bitfields2.queue_sel =
|
|
||||||
queue_sel__mes_unmap_queues__perform_request_on_specified_queues;
|
|
||||||
packet->bitfields2.num_queues = 1;
|
|
||||||
packet->bitfields3b.doorbell_offset0 = filter_param;
|
|
||||||
break;
|
|
||||||
case KFD_UNMAP_QUEUES_FILTER_BY_PASID:
|
|
||||||
packet->bitfields2.queue_sel =
|
|
||||||
queue_sel__mes_unmap_queues__perform_request_on_pasid_queues;
|
|
||||||
packet->bitfields3a.pasid = filter_param;
|
|
||||||
break;
|
|
||||||
case KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES:
|
|
||||||
packet->bitfields2.queue_sel =
|
|
||||||
queue_sel__mes_unmap_queues__unmap_all_queues;
|
|
||||||
break;
|
|
||||||
case KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES:
|
|
||||||
/* in this case, we do not preempt static queues */
|
|
||||||
packet->bitfields2.queue_sel =
|
|
||||||
queue_sel__mes_unmap_queues__unmap_all_non_static_queues;
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
WARN(1, "filter %d", filter);
|
|
||||||
retval = -EINVAL;
|
|
||||||
goto err_invalid;
|
|
||||||
}
|
|
||||||
|
|
||||||
pm->priv_queue->ops.submit_packet(pm->priv_queue);
|
|
||||||
|
|
||||||
mutex_unlock(&pm->lock);
|
|
||||||
return 0;
|
|
||||||
|
|
||||||
err_invalid:
|
|
||||||
pm->priv_queue->ops.rollback_packet(pm->priv_queue);
|
|
||||||
err_acquire_packet_buffer:
|
|
||||||
mutex_unlock(&pm->lock);
|
mutex_unlock(&pm->lock);
|
||||||
return retval;
|
return retval;
|
||||||
}
|
}
|
||||||
|
|
|
@ -866,8 +866,41 @@ struct packet_manager {
|
||||||
bool allocated;
|
bool allocated;
|
||||||
struct kfd_mem_obj *ib_buffer_obj;
|
struct kfd_mem_obj *ib_buffer_obj;
|
||||||
unsigned int ib_size_bytes;
|
unsigned int ib_size_bytes;
|
||||||
|
|
||||||
|
const struct packet_manager_funcs *pmf;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
struct packet_manager_funcs {
|
||||||
|
/* Support ASIC-specific packet formats for PM4 packets */
|
||||||
|
int (*map_process)(struct packet_manager *pm, uint32_t *buffer,
|
||||||
|
struct qcm_process_device *qpd);
|
||||||
|
int (*runlist)(struct packet_manager *pm, uint32_t *buffer,
|
||||||
|
uint64_t ib, size_t ib_size_in_dwords, bool chain);
|
||||||
|
int (*set_resources)(struct packet_manager *pm, uint32_t *buffer,
|
||||||
|
struct scheduling_resources *res);
|
||||||
|
int (*map_queues)(struct packet_manager *pm, uint32_t *buffer,
|
||||||
|
struct queue *q, bool is_static);
|
||||||
|
int (*unmap_queues)(struct packet_manager *pm, uint32_t *buffer,
|
||||||
|
enum kfd_queue_type type,
|
||||||
|
enum kfd_unmap_queues_filter mode,
|
||||||
|
uint32_t filter_param, bool reset,
|
||||||
|
unsigned int sdma_engine);
|
||||||
|
int (*query_status)(struct packet_manager *pm, uint32_t *buffer,
|
||||||
|
uint64_t fence_address, uint32_t fence_value);
|
||||||
|
int (*release_mem)(uint64_t gpu_addr, uint32_t *buffer);
|
||||||
|
|
||||||
|
/* Packet sizes */
|
||||||
|
int map_process_size;
|
||||||
|
int runlist_size;
|
||||||
|
int set_resources_size;
|
||||||
|
int map_queues_size;
|
||||||
|
int unmap_queues_size;
|
||||||
|
int query_status_size;
|
||||||
|
int release_mem_size;
|
||||||
|
};
|
||||||
|
|
||||||
|
extern const struct packet_manager_funcs kfd_vi_pm_funcs;
|
||||||
|
|
||||||
int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm);
|
int pm_init(struct packet_manager *pm, struct device_queue_manager *dqm);
|
||||||
void pm_uninit(struct packet_manager *pm);
|
void pm_uninit(struct packet_manager *pm);
|
||||||
int pm_send_set_resources(struct packet_manager *pm,
|
int pm_send_set_resources(struct packet_manager *pm,
|
||||||
|
@ -883,8 +916,6 @@ int pm_send_unmap_queue(struct packet_manager *pm, enum kfd_queue_type type,
|
||||||
|
|
||||||
void pm_release_ib(struct packet_manager *pm);
|
void pm_release_ib(struct packet_manager *pm);
|
||||||
|
|
||||||
uint32_t pm_create_release_mem(uint64_t gpu_addr, uint32_t *buffer);
|
|
||||||
|
|
||||||
uint64_t kfd_get_number_elems(struct kfd_dev *kfd);
|
uint64_t kfd_get_number_elems(struct kfd_dev *kfd);
|
||||||
|
|
||||||
/* Events */
|
/* Events */
|
||||||
|
|
Loading…
Reference in New Issue