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drm/nouveau/fifo: initialise vmm with new interfaces 

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2017-11-01 03:56:19 +10:00
parent 85f7c3a036
commit f66c57d922
10 changed files with 31 additions and 57 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/nouveau/include/nvkm/engine/fifo.h
View File

@ -22,7 +22,7 @@ struct nvkm_fifo_chan {
u16 chid;
struct nvkm_gpuobj *inst;
struct nvkm_gpuobj *push;
struct nvkm_vm *vm;
struct nvkm_vmm *vmm;
void __iomem *user;
u64 addr;
u32 size;

33
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chan.c
View File

@ -27,6 +27,7 @@
#include <core/gpuobj.h>
#include <core/oproxy.h>
#include <subdev/mmu.h>
#include <subdev/mmu/priv.h>
#include <engine/dma.h>
struct nvkm_fifo_chan_object {
@ -117,8 +118,8 @@ nvkm_fifo_chan_child_del(struct nvkm_oproxy *base)
if (chan->func->engine_dtor)
chan->func->engine_dtor(chan, engine);
nvkm_object_del(&engn->object);
if (chan->vm)
atomic_dec(&chan->vm->engref[engine->subdev.index]);
if (chan->vmm)
atomic_dec(&chan->vmm->engref[engine->subdev.index]);
}
}
@ -151,8 +152,8 @@ nvkm_fifo_chan_child_new(const struct nvkm_oclass *oclass, void *data, u32 size,
.engine = oclass->engine,
};
if (chan->vm)
atomic_inc(&chan->vm->engref[engine->subdev.index]);
if (chan->vmm)
atomic_inc(&chan->vmm->engref[engine->subdev.index]);
if (engine->func->fifo.cclass) {
ret = engine->func->fifo.cclass(chan, &cclass,
@ -327,7 +328,10 @@ nvkm_fifo_chan_dtor(struct nvkm_object *object)
if (chan->user)
iounmap(chan->user);
nvkm_vm_ref(NULL, &chan->vm, NULL);
if (chan->vmm) {
nvkm_vmm_part(chan->vmm, chan->inst->memory);
nvkm_vmm_unref(&chan->vmm);
}
nvkm_gpuobj_del(&chan->push);
nvkm_gpuobj_del(&chan->inst);
@ -355,7 +359,6 @@ nvkm_fifo_chan_ctor(const struct nvkm_fifo_chan_func *func,
{
struct nvkm_client *client = oclass->client;
struct nvkm_device *device = fifo->engine.subdev.device;
struct nvkm_mmu *mmu = device->mmu;
struct nvkm_dmaobj *dmaobj;
unsigned long flags;
int ret;
@ -384,16 +387,16 @@ nvkm_fifo_chan_ctor(const struct nvkm_fifo_chan_func *func,
}
/* channel address space */
if (!vm && mmu) {
if (!client->vm || client->vm->mmu == mmu) {
ret = nvkm_vm_ref(client->vm, &chan->vm, NULL);
if (ret)
return ret;
} else {
if (!device->mmu->func->vmm.global) {
struct nvkm_vmm *vmm = client->vm;
if (vmm->mmu != device->mmu)
return -EINVAL;
}
} else {
return -ENOENT;
ret = nvkm_vmm_join(vmm, chan->inst->memory);
if (ret)
return ret;
chan->vmm = nvkm_vmm_ref(vmm);
}
/* allocate channel id */

6
drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c
View File

@ -277,9 +277,5 @@ g84_fifo_chan_ctor(struct nv50_fifo *fifo, u64 vm, u64 push,
if (ret)
return ret;
ret = nvkm_ramht_new(device, 0x8000, 16, chan->base.inst, &chan->ramht);
if (ret)
return ret;
return nvkm_vm_ref(chan->base.vm, &chan->vm, chan->base.inst->memory);
return nvkm_ramht_new(device, 0x8000, 16, chan->base.inst, &chan->ramht);
}

2
drivers/gpu/drm/nouveau/nvkm/engine/fifo/changf100.h
View File

@ -11,8 +11,6 @@ struct gf100_fifo_chan {
struct list_head head;
bool killed;
struct nvkm_vm *vm;
struct {
struct nvkm_gpuobj *inst;
struct nvkm_vma vma;

2
drivers/gpu/drm/nouveau/nvkm/engine/fifo/changk104.h
View File

@ -12,8 +12,6 @@ struct gk104_fifo_chan {
struct list_head head;
bool killed;
struct nvkm_vm *vm;
struct {
struct nvkm_gpuobj *inst;
struct nvkm_vma vma;

8
drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.c
View File

@ -206,8 +206,6 @@ void *
nv50_fifo_chan_dtor(struct nvkm_fifo_chan *base)
{
struct nv50_fifo_chan *chan = nv50_fifo_chan(base);
if (chan->base.inst)
nvkm_vm_ref(NULL, &chan->vm, chan->base.inst->memory);
nvkm_ramht_del(&chan->ramht);
nvkm_gpuobj_del(&chan->pgd);
nvkm_gpuobj_del(&chan->eng);
@ -263,9 +261,5 @@ nv50_fifo_chan_ctor(struct nv50_fifo *fifo, u64 vm, u64 push,
if (ret)
return ret;
ret = nvkm_ramht_new(device, 0x8000, 16, chan->base.inst, &chan->ramht);
if (ret)
return ret;
return nvkm_vm_ref(chan->base.vm, &chan->vm, chan->base.inst->memory);
return nvkm_ramht_new(device, 0x8000, 16, chan->base.inst, &chan->ramht);
}

1
drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.h
View File

@ -13,7 +13,6 @@ struct nv50_fifo_chan {
struct nvkm_gpuobj *eng;
struct nvkm_gpuobj *pgd;
struct nvkm_ramht *ramht;
struct nvkm_vm *vm;
struct nvkm_gpuobj *engn[NVKM_SUBDEV_NR];
};

13
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c
View File

@ -150,12 +150,12 @@ gf100_fifo_gpfifo_engine_ctor(struct nvkm_fifo_chan *base,
if (ret)
return ret;
ret = nvkm_vm_get(chan->vm, chan->engn[engn].inst->size, 12,
ret = nvkm_vm_get(chan->base.vmm, chan->engn[engn].inst->size, 12,
NV_MEM_ACCESS_RW, &chan->engn[engn].vma);
if (ret)
return ret;
return nvkm_memory_map(chan->engn[engn].inst, 0, chan->vm,
return nvkm_memory_map(chan->engn[engn].inst, 0, chan->base.vmm,
&chan->engn[engn].vma, NULL, 0);
}
@ -199,10 +199,7 @@ gf100_fifo_gpfifo_init(struct nvkm_fifo_chan *base)
static void *
gf100_fifo_gpfifo_dtor(struct nvkm_fifo_chan *base)
{
struct gf100_fifo_chan *chan = gf100_fifo_chan(base);
if (chan->base.inst)
nvkm_vm_ref(NULL, &chan->vm, chan->base.inst->memory);
return chan;
return gf100_fifo_chan(base);
}
static const struct nvkm_fifo_chan_func
@ -262,10 +259,6 @@ gf100_fifo_gpfifo_new(struct nvkm_fifo *base, const struct nvkm_oclass *oclass,
args->v0.chid = chan->base.chid;
ret = nvkm_vm_ref(chan->base.vm, &chan->vm, chan->base.inst->memory);
if (ret)
return ret;
/* clear channel control registers */
usermem = chan->base.chid * 0x1000;

13
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c
View File

@ -162,12 +162,12 @@ gk104_fifo_gpfifo_engine_ctor(struct nvkm_fifo_chan *base,
if (ret)
return ret;
ret = nvkm_vm_get(chan->vm, chan->engn[engn].inst->size, 12,
ret = nvkm_vm_get(chan->base.vmm, chan->engn[engn].inst->size, 12,
NV_MEM_ACCESS_RW, &chan->engn[engn].vma);
if (ret)
return ret;
return nvkm_memory_map(chan->engn[engn].inst, 0, chan->vm,
return nvkm_memory_map(chan->engn[engn].inst, 0, chan->base.vmm,
&chan->engn[engn].vma, NULL, 0);
}
@ -212,10 +212,7 @@ gk104_fifo_gpfifo_init(struct nvkm_fifo_chan *base)
static void *
gk104_fifo_gpfifo_dtor(struct nvkm_fifo_chan *base)
{
struct gk104_fifo_chan *chan = gk104_fifo_chan(base);
if (chan->base.inst)
nvkm_vm_ref(NULL, &chan->vm, chan->base.inst->memory);
return chan;
return gk104_fifo_chan(base);
}
static const struct nvkm_fifo_chan_func
@ -301,10 +298,6 @@ gk104_fifo_gpfifo_new_(const struct gk104_fifo_chan_func *func,
*chid = chan->base.chid;
ret = nvkm_vm_ref(chan->base.vm, &chan->vm, chan->base.inst->memory);
if (ret)
return ret;
/* Clear channel control registers. */
usermem = chan->base.chid * 0x200;
ilength = order_base_2(ilength / 8);

8
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
View File

@ -398,12 +398,12 @@ gf100_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch,
if (ret)
return ret;
ret = nvkm_vm_get(fifoch->vm, 0x1000, 12, NV_MEM_ACCESS_RW |
ret = nvkm_vm_get(fifoch->vmm, 0x1000, 12, NV_MEM_ACCESS_RW |
NV_MEM_ACCESS_SYS, &chan->mmio_vma);
if (ret)
return ret;
ret = nvkm_memory_map(chan->mmio, 0, fifoch->vm,
ret = nvkm_memory_map(chan->mmio, 0, fifoch->vmm,
&chan->mmio_vma, NULL, 0);
if (ret)
return ret;
@ -416,13 +416,13 @@ gf100_gr_chan_new(struct nvkm_gr *base, struct nvkm_fifo_chan *fifoch,
if (ret)
return ret;
ret = nvkm_vm_get(fifoch->vm,
ret = nvkm_vm_get(fifoch->vmm,
nvkm_memory_size(chan->data[i].mem), 12,
data->access, &chan->data[i].vma);
if (ret)
return ret;
ret = nvkm_memory_map(chan->data[i].mem, 0, fifoch->vm,
ret = nvkm_memory_map(chan->data[i].mem, 0, fifoch->vmm,
&chan->data[i].vma, NULL, 0);
if (ret)
return ret;