ath10k: Fix DMA burst size
A value of zero indicates that 128B is the maximum DMA request size for read/writes. But PCI cards based on AR9880 can support 256B, so enable this for the 10.2 firmware. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
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@ -183,6 +183,9 @@ struct ath10k_pktlog_hdr {
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#define TARGET_10X_NUM_MSDU_DESC (1024 + 400)
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#define TARGET_10X_MAX_FRAG_ENTRIES 0
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/* 10.2 parameters */
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#define TARGET_10_2_DMA_BURST_SIZE 1
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/* Target specific defines for WMI-TLV firmware */
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#define TARGET_TLV_NUM_VDEVS 3
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#define TARGET_TLV_NUM_STATIONS 32
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@ -3744,7 +3744,7 @@ static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
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config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
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config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
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config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
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config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
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config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
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config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
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val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
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