ethtool: Add support for low latency RS FEC
Add support for low latency Reed Solomon FEC as LLRS. The LL-FEC is defined by the 25G/50G ethernet consortium, in the document titled "Low Latency Reed Solomon Forward Error Correction" Signed-off-by: Aya Levin <ayal@mellanox.com> Reviewed-by: Eran Ben Elisha <eranbe@mellanox.com> CC: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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@ -8,7 +8,7 @@
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const char *phy_speed_to_str(int speed)
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const char *phy_speed_to_str(int speed)
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{
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{
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BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 74,
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BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 75,
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"Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
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"Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
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"If a speed or mode has been added please update phy_speed_to_str "
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"If a speed or mode has been added please update phy_speed_to_str "
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"and the PHY settings array.\n");
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"and the PHY settings array.\n");
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@ -1330,6 +1330,7 @@ enum ethtool_fec_config_bits {
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ETHTOOL_FEC_OFF_BIT,
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ETHTOOL_FEC_OFF_BIT,
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ETHTOOL_FEC_RS_BIT,
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ETHTOOL_FEC_RS_BIT,
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ETHTOOL_FEC_BASER_BIT,
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ETHTOOL_FEC_BASER_BIT,
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ETHTOOL_FEC_LLRS_BIT,
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};
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};
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#define ETHTOOL_FEC_NONE (1 << ETHTOOL_FEC_NONE_BIT)
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#define ETHTOOL_FEC_NONE (1 << ETHTOOL_FEC_NONE_BIT)
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@ -1337,6 +1338,7 @@ enum ethtool_fec_config_bits {
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#define ETHTOOL_FEC_OFF (1 << ETHTOOL_FEC_OFF_BIT)
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#define ETHTOOL_FEC_OFF (1 << ETHTOOL_FEC_OFF_BIT)
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#define ETHTOOL_FEC_RS (1 << ETHTOOL_FEC_RS_BIT)
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#define ETHTOOL_FEC_RS (1 << ETHTOOL_FEC_RS_BIT)
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#define ETHTOOL_FEC_BASER (1 << ETHTOOL_FEC_BASER_BIT)
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#define ETHTOOL_FEC_BASER (1 << ETHTOOL_FEC_BASER_BIT)
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#define ETHTOOL_FEC_LLRS (1 << ETHTOOL_FEC_LLRS_BIT)
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/* CMDs currently supported */
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/* CMDs currently supported */
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#define ETHTOOL_GSET 0x00000001 /* DEPRECATED, Get settings.
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#define ETHTOOL_GSET 0x00000001 /* DEPRECATED, Get settings.
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@ -1521,7 +1523,7 @@ enum ethtool_link_mode_bit_indices {
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ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT = 71,
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ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT = 71,
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ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT = 72,
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ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT = 72,
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ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT = 73,
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ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT = 73,
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ETHTOOL_LINK_MODE_FEC_LLRS_BIT = 74,
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/* must be last entry */
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/* must be last entry */
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__ETHTOOL_LINK_MODE_MASK_NBITS
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__ETHTOOL_LINK_MODE_MASK_NBITS
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};
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};
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@ -168,6 +168,7 @@ const char link_mode_names[][ETH_GSTRING_LEN] = {
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__DEFINE_LINK_MODE_NAME(400000, LR8_ER8_FR8, Full),
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__DEFINE_LINK_MODE_NAME(400000, LR8_ER8_FR8, Full),
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__DEFINE_LINK_MODE_NAME(400000, DR8, Full),
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__DEFINE_LINK_MODE_NAME(400000, DR8, Full),
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__DEFINE_LINK_MODE_NAME(400000, CR8, Full),
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__DEFINE_LINK_MODE_NAME(400000, CR8, Full),
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__DEFINE_SPECIAL_MODE_NAME(FEC_LLRS, "LLRS"),
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};
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};
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static_assert(ARRAY_SIZE(link_mode_names) == __ETHTOOL_LINK_MODE_MASK_NBITS);
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static_assert(ARRAY_SIZE(link_mode_names) == __ETHTOOL_LINK_MODE_MASK_NBITS);
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@ -237,6 +237,7 @@ static const struct link_mode_info link_mode_params[] = {
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__DEFINE_LINK_MODE_PARAMS(400000, LR8_ER8_FR8, Full),
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__DEFINE_LINK_MODE_PARAMS(400000, LR8_ER8_FR8, Full),
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__DEFINE_LINK_MODE_PARAMS(400000, DR8, Full),
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__DEFINE_LINK_MODE_PARAMS(400000, DR8, Full),
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__DEFINE_LINK_MODE_PARAMS(400000, CR8, Full),
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__DEFINE_LINK_MODE_PARAMS(400000, CR8, Full),
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__DEFINE_SPECIAL_MODE_PARAMS(FEC_LLRS),
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};
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};
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static const struct nla_policy
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static const struct nla_policy
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