PCI: tegra: Add support to configure sideband pins
Add support to configure sideband signal pins when the information is present in the respective controller device-tree node. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> [bhelgaas: fold in YueHaibing's fix for build error without CONFIG_PINCTRL; https://lore.kernel.org/r/20190920014807.38288-1-yuehaibing@huawei.com] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Acked-by: Thierry Reding <treding@nvidia.com>
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@ -22,6 +22,7 @@
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#include <linux/of_pci.h>
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#include <linux/of_pci.h>
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#include <linux/pci.h>
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#include <linux/pci.h>
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#include <linux/phy/phy.h>
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#include <linux/phy/phy.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/pm_runtime.h>
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#include <linux/random.h>
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#include <linux/random.h>
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@ -1311,8 +1312,13 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie)
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if (ret < 0) {
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if (ret < 0) {
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dev_err(dev, "Failed to get runtime sync for PCIe dev: %d\n",
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dev_err(dev, "Failed to get runtime sync for PCIe dev: %d\n",
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ret);
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ret);
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pm_runtime_disable(dev);
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goto fail_pm_get_sync;
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return ret;
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}
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ret = pinctrl_pm_select_default_state(dev);
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if (ret < 0) {
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dev_err(dev, "Failed to configure sideband pins: %d\n", ret);
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goto fail_pinctrl;
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}
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}
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tegra_pcie_init_controller(pcie);
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tegra_pcie_init_controller(pcie);
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@ -1339,7 +1345,9 @@ static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie)
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fail_host_init:
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fail_host_init:
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tegra_pcie_deinit_controller(pcie);
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tegra_pcie_deinit_controller(pcie);
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fail_pinctrl:
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pm_runtime_put_sync(dev);
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pm_runtime_put_sync(dev);
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fail_pm_get_sync:
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pm_runtime_disable(dev);
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pm_runtime_disable(dev);
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return ret;
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return ret;
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}
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}
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