drivers: usb: fsl: Modify phy clk valid bit checking
Phy_clk_valid bit is checked only when the boolean property phy-clk-valid in present in usb node device tree. This property is added to the usb node via device tree fixup. Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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6009d95e04
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@ -230,14 +230,14 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
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break;
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}
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if (pdata->have_sysif_regs &&
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pdata->controller_ver > FSL_USB_VER_1_6 &&
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(phy_mode == FSL_USB2_PHY_ULPI)) {
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/* check PHY_CLK_VALID to get phy clk valid */
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if (!(spin_event_timeout(in_be32(non_ehci + FSL_SOC_USB_CTRL) &
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PHY_CLK_VALID, FSL_USB_PHY_CLK_TIMEOUT, 0) ||
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in_be32(non_ehci + FSL_SOC_USB_PRICTRL))) {
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dev_warn(hcd->self.controller, "USB PHY clock invalid\n");
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/*
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* check PHY_CLK_VALID to determine phy clock presence before writing
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* to portsc
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*/
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if (pdata->check_phy_clk_valid) {
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if (!(in_be32(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID)) {
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dev_warn(hcd->self.controller,
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"USB PHY clock invalid\n");
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return -EINVAL;
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}
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}
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@ -222,6 +222,15 @@ static int fsl_usb2_mph_dr_of_probe(struct platform_device *ofdev)
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else
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pdata->has_fsl_erratum_a007792 = 0;
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/*
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* Determine whether phy_clk_valid needs to be checked
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* by reading property in device tree
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*/
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if (of_get_property(np, "phy-clk-valid", NULL))
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pdata->check_phy_clk_valid = 1;
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else
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pdata->check_phy_clk_valid = 0;
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if (pdata->have_sysif_regs) {
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if (pdata->controller_ver == FSL_USB_VER_NONE) {
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dev_warn(&ofdev->dev, "Could not get controller version\n");
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@ -99,6 +99,7 @@ struct fsl_usb2_platform_data {
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unsigned suspended:1;
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unsigned already_suspended:1;
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unsigned has_fsl_erratum_a007792:1;
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unsigned check_phy_clk_valid:1;
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/* register save area for suspend/resume */
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u32 pm_command;
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