ixgbe: disable link when adapter goes down
This patch fixes an issue with the 82599 adapter where it can potentially keep link lights up when the adapter has gone down. The patch adds a function which ensures link is disabled, and calls this function when the adapter transitions to a down state. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -49,6 +49,7 @@ static s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
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static s32 ixgbe_setup_mac_link_smartspeed(struct ixgbe_hw *hw,
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ixgbe_link_speed speed,
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bool autoneg_wait_to_complete);
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static void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw);
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static s32 ixgbe_start_mac_link_82599(struct ixgbe_hw *hw,
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bool autoneg_wait_to_complete);
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static s32 ixgbe_setup_mac_link_82599(struct ixgbe_hw *hw,
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@ -431,6 +432,24 @@ out:
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return media_type;
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}
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/**
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* ixgbe_stop_mac_link_on_d3_82599 - Disables link on D3
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* @hw: pointer to hardware structure
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*
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* Disables link, should be called during D3 power down sequence.
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*
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*/
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static void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw)
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{
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u32 autoc2_reg;
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if (!hw->mng_fw_enabled && !hw->wol_enabled) {
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autoc2_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
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autoc2_reg |= IXGBE_AUTOC2_LINK_DISABLE_ON_D3_MASK;
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IXGBE_WRITE_REG(hw, IXGBE_AUTOC2, autoc2_reg);
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}
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}
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/**
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* ixgbe_start_mac_link_82599 - Setup MAC link settings
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* @hw: pointer to hardware structure
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@ -2477,6 +2496,7 @@ static struct ixgbe_mac_operations mac_ops_82599 = {
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.set_lan_id = &ixgbe_set_lan_id_multi_port_pcie,
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.read_analog_reg8 = &ixgbe_read_analog_reg8_82599,
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.write_analog_reg8 = &ixgbe_write_analog_reg8_82599,
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.stop_link_on_d3 = &ixgbe_stop_mac_link_on_d3_82599,
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.setup_link = &ixgbe_setup_mac_link_82599,
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.set_rxpba = &ixgbe_set_rxpba_generic,
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.check_link = &ixgbe_check_mac_link_generic,
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@ -5292,6 +5292,9 @@ static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
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return retval;
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#endif
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if (hw->mac.ops.stop_link_on_d3)
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hw->mac.ops.stop_link_on_d3(hw);
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if (wufc) {
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ixgbe_set_rx_mode(netdev);
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@ -1596,6 +1596,7 @@ enum {
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#define IXGBE_AUTOC2_10G_KR (0x0 << IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_SHIFT)
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#define IXGBE_AUTOC2_10G_XFI (0x1 << IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_SHIFT)
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#define IXGBE_AUTOC2_10G_SFI (0x2 << IXGBE_AUTOC2_10G_SERIAL_PMA_PMD_SHIFT)
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#define IXGBE_AUTOC2_LINK_DISABLE_ON_D3_MASK 0x50000000
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#define IXGBE_AUTOC2_LINK_DISABLE_MASK 0x70000000
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#define IXGBE_MACC_FLU 0x00000001
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@ -2847,6 +2848,7 @@ struct ixgbe_mac_operations {
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void (*disable_tx_laser)(struct ixgbe_hw *);
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void (*enable_tx_laser)(struct ixgbe_hw *);
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void (*flap_tx_laser)(struct ixgbe_hw *);
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void (*stop_link_on_d3)(struct ixgbe_hw *);
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s32 (*setup_link)(struct ixgbe_hw *, ixgbe_link_speed, bool);
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s32 (*check_link)(struct ixgbe_hw *, ixgbe_link_speed *, bool *, bool);
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s32 (*get_link_capabilities)(struct ixgbe_hw *, ixgbe_link_speed *,
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