dt-bindings: net: cdns,macb: added generic PHY and reset mappings for ZynqMP
Updated macb DT binding documentation to reflect the phy-names, phys, resets, reset-names properties which are now used with ZynqMP GEM devices, and added a ZynqMP-specific DT example. Signed-off-by: Robert Hancock <robert.hancock@calian.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -81,6 +81,25 @@ properties:
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phy-handle: true
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phys:
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maxItems: 1
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phy-names:
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const: sgmii-phy
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description:
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Required with ZynqMP SoC when in SGMII mode.
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Should reference PS-GTR generic PHY device for this controller
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instance. See ZynqMP example.
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resets:
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maxItems: 1
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description:
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Recommended with ZynqMP, specify reset control for this
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controller instance with zynqmp-reset driver.
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reset-names:
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maxItems: 1
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fixed-link: true
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iommus:
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@ -157,3 +176,40 @@ examples:
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reset-gpios = <&pioE 6 1>;
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};
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};
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- |
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#include <dt-bindings/clock/xlnx-zynqmp-clk.h>
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#include <dt-bindings/power/xlnx-zynqmp-power.h>
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#include <dt-bindings/reset/xlnx-zynqmp-resets.h>
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#include <dt-bindings/phy/phy.h>
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bus {
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#address-cells = <2>;
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#size-cells = <2>;
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gem1: ethernet@ff0c0000 {
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compatible = "cdns,zynqmp-gem", "cdns,gem";
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interrupt-parent = <&gic>;
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interrupts = <0 59 4>, <0 59 4>;
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reg = <0x0 0xff0c0000 0x0 0x1000>;
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clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM1_REF>,
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<&zynqmp_clk GEM1_TX>, <&zynqmp_clk GEM1_RX>,
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<&zynqmp_clk GEM_TSU>;
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clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
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#address-cells = <1>;
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#size-cells = <0>;
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#stream-id-cells = <1>;
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iommus = <&smmu 0x875>;
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power-domains = <&zynqmp_firmware PD_ETH_1>;
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resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>;
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reset-names = "gem1_rst";
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status = "okay";
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phy-mode = "sgmii";
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phy-names = "sgmii-phy";
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phys = <&psgtr 1 PHY_TYPE_SGMII 1 1>;
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fixed-link {
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speed = <1000>;
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full-duplex;
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pause;
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};
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};
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};
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