ARM: sun8i: Move A23 AHB1 gates out of common DTSI
The AHB1 gates were assumed to be identical between the A23 and the A33, which turned out to be wrong. Move the A23 gates definition to the A23 DTSI. Reported-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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@ -175,31 +175,6 @@
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clock-output-names = "apb1";
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};
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ahb1_gates: clk@01c20060 {
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#clock-cells = <1>;
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compatible = "allwinner,sun8i-a23-ahb1-gates-clk";
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reg = <0x01c20060 0x8>;
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clocks = <&ahb1>;
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clock-indices = <1>, <6>,
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<8>, <9>, <10>,
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<13>, <14>,
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<19>, <20>,
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<21>, <24>, <26>,
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<29>, <32>, <36>,
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<40>, <44>, <46>,
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<52>, <54>,
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<57>;
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clock-output-names = "ahb1_mipidsi", "ahb1_dma",
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"ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2",
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"ahb1_nand", "ahb1_sdram",
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"ahb1_hstimer", "ahb1_spi0",
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"ahb1_spi1", "ahb1_otg", "ahb1_ehci",
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"ahb1_ohci", "ahb1_ve", "ahb1_lcd",
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"ahb1_csi", "ahb1_be", "ahb1_fe",
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"ahb1_gpu", "ahb1_spinlock",
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"ahb1_drc";
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};
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apb1_gates: clk@01c20068 {
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#clock-cells = <1>;
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compatible = "allwinner,sun8i-a23-apb1-gates-clk";
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@ -50,6 +50,31 @@
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};
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clocks {
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ahb1_gates: clk@01c20060 {
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#clock-cells = <1>;
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compatible = "allwinner,sun8i-a23-ahb1-gates-clk";
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reg = <0x01c20060 0x8>;
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clocks = <&ahb1>;
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clock-indices = <1>, <6>,
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<8>, <9>, <10>,
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<13>, <14>,
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<19>, <20>,
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<21>, <24>, <26>,
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<29>, <32>, <36>,
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<40>, <44>, <46>,
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<52>, <54>,
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<57>;
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clock-output-names = "ahb1_mipidsi", "ahb1_dma",
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"ahb1_mmc0", "ahb1_mmc1", "ahb1_mmc2",
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"ahb1_nand", "ahb1_sdram",
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"ahb1_hstimer", "ahb1_spi0",
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"ahb1_spi1", "ahb1_otg", "ahb1_ehci",
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"ahb1_ohci", "ahb1_ve", "ahb1_lcd",
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"ahb1_csi", "ahb1_be", "ahb1_fe",
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"ahb1_gpu", "ahb1_spinlock",
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"ahb1_drc";
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};
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mbus_clk: clk@01c2015c {
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#clock-cells = <0>;
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compatible = "allwinner,sun8i-a23-mbus-clk";
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