i2c: add bcm2835 driver
This implements a very basic I2C host driver for the BCM2835 SoC. Missing features so far are: * 10-bit addressing. * DMA. Reviewed-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Wolfram Sang <wolfram@the-dreams.de>
This commit is contained in:
Stephen Warren
Wolfram Sang
parent
cb7f07a4c5
commit
f3b54b9a06
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@ -0,0 +1,20 @@
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Broadcom BCM2835 I2C controller
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Required properties:
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- compatible : Should be "brcm,bcm2835-i2c".
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- reg: Should contain register location and length.
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- interrupts: Should contain interrupt.
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- clocks : The clock feeding the I2C controller.
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Recommended properties:
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- clock-frequency : desired I2C bus clock frequency in Hz.
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Example:
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i2c@20205000 {
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compatible = "brcm,bcm2835-i2c";
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reg = <0x7e205000 0x1000>;
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interrupts = <2 21>;
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clocks = <&clk_i2c>;
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clock-frequency = <100000>;
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};
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@ -330,6 +330,18 @@ config I2C_AU1550
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This driver can also be built as a module. If so, the module
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will be called i2c-au1550.
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config I2C_BCM2835
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tristate "Broadcom BCM2835 I2C controller"
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depends on ARCH_BCM2835
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help
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If you say yes to this option, support will be included for the
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BCM2835 I2C controller.
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If you don't know what to do here, say N.
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This support is also available as a module. If so, the module
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will be called i2c-bcm2835.
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config I2C_BLACKFIN_TWI
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tristate "Blackfin TWI I2C support"
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depends on BLACKFIN
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@ -31,6 +31,7 @@ obj-$(CONFIG_I2C_POWERMAC) += i2c-powermac.o
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# Embedded system I2C/SMBus host controller drivers
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obj-$(CONFIG_I2C_AT91) += i2c-at91.o
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obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o
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obj-$(CONFIG_I2C_BCM2835) += i2c-bcm2835.o
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obj-$(CONFIG_I2C_BLACKFIN_TWI) += i2c-bfin-twi.o
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obj-$(CONFIG_I2C_CBUS_GPIO) += i2c-cbus-gpio.o
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obj-$(CONFIG_I2C_CPM) += i2c-cpm.o
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@ -0,0 +1,342 @@
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/*
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* BCM2835 master mode driver
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/clk.h>
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#include <linux/completion.h>
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#include <linux/err.h>
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#define BCM2835_I2C_C 0x0
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#define BCM2835_I2C_S 0x4
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#define BCM2835_I2C_DLEN 0x8
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#define BCM2835_I2C_A 0xc
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#define BCM2835_I2C_FIFO 0x10
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#define BCM2835_I2C_DIV 0x14
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#define BCM2835_I2C_DEL 0x18
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#define BCM2835_I2C_CLKT 0x1c
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#define BCM2835_I2C_C_READ BIT(0)
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#define BCM2835_I2C_C_CLEAR BIT(4) /* bits 4 and 5 both clear */
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#define BCM2835_I2C_C_ST BIT(7)
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#define BCM2835_I2C_C_INTD BIT(8)
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#define BCM2835_I2C_C_INTT BIT(9)
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#define BCM2835_I2C_C_INTR BIT(10)
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#define BCM2835_I2C_C_I2CEN BIT(15)
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#define BCM2835_I2C_S_TA BIT(0)
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#define BCM2835_I2C_S_DONE BIT(1)
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#define BCM2835_I2C_S_TXW BIT(2)
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#define BCM2835_I2C_S_RXR BIT(3)
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#define BCM2835_I2C_S_TXD BIT(4)
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#define BCM2835_I2C_S_RXD BIT(5)
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#define BCM2835_I2C_S_TXE BIT(6)
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#define BCM2835_I2C_S_RXF BIT(7)
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#define BCM2835_I2C_S_ERR BIT(8)
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#define BCM2835_I2C_S_CLKT BIT(9)
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#define BCM2835_I2C_S_LEN BIT(10) /* Fake bit for SW error reporting */
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#define BCM2835_I2C_TIMEOUT (msecs_to_jiffies(1000))
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struct bcm2835_i2c_dev {
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struct device *dev;
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void __iomem *regs;
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struct clk *clk;
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int irq;
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struct i2c_adapter adapter;
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struct completion completion;
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u32 msg_err;
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u8 *msg_buf;
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size_t msg_buf_remaining;
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};
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static inline void bcm2835_i2c_writel(struct bcm2835_i2c_dev *i2c_dev,
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u32 reg, u32 val)
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{
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writel(val, i2c_dev->regs + reg);
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}
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static inline u32 bcm2835_i2c_readl(struct bcm2835_i2c_dev *i2c_dev, u32 reg)
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{
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return readl(i2c_dev->regs + reg);
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}
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static void bcm2835_fill_txfifo(struct bcm2835_i2c_dev *i2c_dev)
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{
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u32 val;
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while (i2c_dev->msg_buf_remaining) {
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val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
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if (!(val & BCM2835_I2C_S_TXD))
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break;
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bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_FIFO,
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*i2c_dev->msg_buf);
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i2c_dev->msg_buf++;
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i2c_dev->msg_buf_remaining--;
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}
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}
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static void bcm2835_drain_rxfifo(struct bcm2835_i2c_dev *i2c_dev)
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{
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u32 val;
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while (i2c_dev->msg_buf_remaining) {
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val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
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if (!(val & BCM2835_I2C_S_RXD))
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break;
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*i2c_dev->msg_buf = bcm2835_i2c_readl(i2c_dev,
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BCM2835_I2C_FIFO);
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i2c_dev->msg_buf++;
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i2c_dev->msg_buf_remaining--;
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}
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}
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static irqreturn_t bcm2835_i2c_isr(int this_irq, void *data)
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{
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struct bcm2835_i2c_dev *i2c_dev = data;
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u32 val, err;
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val = bcm2835_i2c_readl(i2c_dev, BCM2835_I2C_S);
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bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_S, val);
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err = val & (BCM2835_I2C_S_CLKT | BCM2835_I2C_S_ERR);
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if (err) {
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i2c_dev->msg_err = err;
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complete(&i2c_dev->completion);
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return IRQ_HANDLED;
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}
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if (val & BCM2835_I2C_S_RXD) {
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bcm2835_drain_rxfifo(i2c_dev);
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if (!(val & BCM2835_I2C_S_DONE))
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return IRQ_HANDLED;
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}
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if (val & BCM2835_I2C_S_DONE) {
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if (i2c_dev->msg_buf_remaining)
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i2c_dev->msg_err = BCM2835_I2C_S_LEN;
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else
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i2c_dev->msg_err = 0;
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complete(&i2c_dev->completion);
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return IRQ_HANDLED;
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}
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if (val & BCM2835_I2C_S_TXD) {
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bcm2835_fill_txfifo(i2c_dev);
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return IRQ_HANDLED;
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}
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return IRQ_NONE;
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}
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static int bcm2835_i2c_xfer_msg(struct bcm2835_i2c_dev *i2c_dev,
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struct i2c_msg *msg)
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{
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u32 c;
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int time_left;
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i2c_dev->msg_buf = msg->buf;
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i2c_dev->msg_buf_remaining = msg->len;
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INIT_COMPLETION(i2c_dev->completion);
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bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, BCM2835_I2C_C_CLEAR);
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if (msg->flags & I2C_M_RD) {
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c = BCM2835_I2C_C_READ | BCM2835_I2C_C_INTR;
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} else {
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c = BCM2835_I2C_C_INTT;
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bcm2835_fill_txfifo(i2c_dev);
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}
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c |= BCM2835_I2C_C_ST | BCM2835_I2C_C_INTD | BCM2835_I2C_C_I2CEN;
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bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_A, msg->addr);
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bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DLEN, msg->len);
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bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, c);
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time_left = wait_for_completion_timeout(&i2c_dev->completion,
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BCM2835_I2C_TIMEOUT);
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bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, BCM2835_I2C_C_CLEAR);
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if (!time_left) {
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dev_err(i2c_dev->dev, "i2c transfer timed out\n");
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return -ETIMEDOUT;
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}
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if (likely(!i2c_dev->msg_err))
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return 0;
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if ((i2c_dev->msg_err & BCM2835_I2C_S_ERR) &&
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(msg->flags & I2C_M_IGNORE_NAK))
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return 0;
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dev_err(i2c_dev->dev, "i2c transfer failed: %x\n", i2c_dev->msg_err);
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if (i2c_dev->msg_err & BCM2835_I2C_S_ERR)
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return -EREMOTEIO;
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else
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return -EIO;
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}
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static int bcm2835_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[],
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int num)
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{
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struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
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int i;
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int ret = 0;
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for (i = 0; i < num; i++) {
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ret = bcm2835_i2c_xfer_msg(i2c_dev, &msgs[i]);
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if (ret)
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break;
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}
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return ret ?: i;
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}
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static u32 bcm2835_i2c_func(struct i2c_adapter *adap)
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{
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return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
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}
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static const struct i2c_algorithm bcm2835_i2c_algo = {
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.master_xfer = bcm2835_i2c_xfer,
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.functionality = bcm2835_i2c_func,
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};
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static int bcm2835_i2c_probe(struct platform_device *pdev)
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{
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struct bcm2835_i2c_dev *i2c_dev;
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struct resource *mem, *requested, *irq;
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u32 bus_clk_rate, divider;
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int ret;
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struct i2c_adapter *adap;
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i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
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if (!i2c_dev) {
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dev_err(&pdev->dev, "Cannot allocate i2c_dev\n");
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return -ENOMEM;
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}
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platform_set_drvdata(pdev, i2c_dev);
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i2c_dev->dev = &pdev->dev;
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init_completion(&i2c_dev->completion);
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!mem) {
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dev_err(&pdev->dev, "No mem resource\n");
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return -ENODEV;
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}
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requested = devm_request_mem_region(&pdev->dev, mem->start,
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resource_size(mem),
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dev_name(&pdev->dev));
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if (!requested) {
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dev_err(&pdev->dev, "Could not claim register region\n");
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return -EBUSY;
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}
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i2c_dev->regs = devm_ioremap(&pdev->dev, mem->start,
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resource_size(mem));
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if (!i2c_dev->regs) {
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dev_err(&pdev->dev, "Could not map registers\n");
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return -ENOMEM;
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}
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i2c_dev->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(i2c_dev->clk)) {
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dev_err(&pdev->dev, "Could not get clock\n");
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return PTR_ERR(i2c_dev->clk);
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}
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ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
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&bus_clk_rate);
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if (ret < 0) {
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dev_warn(&pdev->dev,
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"Could not read clock-frequency property\n");
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bus_clk_rate = 100000;
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}
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divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk), bus_clk_rate);
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/*
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* Per the datasheet, the register is always interpreted as an even
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* number, by rounding down. In other words, the LSB is ignored. So,
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* if the LSB is set, increment the divider to avoid any issue.
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*/
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if (divider & 1)
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divider++;
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bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DIV, divider);
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irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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if (!irq) {
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dev_err(&pdev->dev, "No IRQ resource\n");
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return -ENODEV;
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}
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i2c_dev->irq = irq->start;
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ret = request_irq(i2c_dev->irq, bcm2835_i2c_isr, IRQF_SHARED,
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dev_name(&pdev->dev), i2c_dev);
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if (ret) {
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dev_err(&pdev->dev, "Could not request IRQ\n");
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return -ENODEV;
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}
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adap = &i2c_dev->adapter;
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i2c_set_adapdata(adap, i2c_dev);
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adap->owner = THIS_MODULE;
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adap->class = I2C_CLASS_HWMON;
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strlcpy(adap->name, "bcm2835 I2C adapter", sizeof(adap->name));
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adap->algo = &bcm2835_i2c_algo;
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adap->dev.parent = &pdev->dev;
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bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_C, 0);
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ret = i2c_add_adapter(adap);
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if (ret)
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free_irq(i2c_dev->irq, i2c_dev);
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return ret;
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}
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static int bcm2835_i2c_remove(struct platform_device *pdev)
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{
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struct bcm2835_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
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free_irq(i2c_dev->irq, i2c_dev);
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i2c_del_adapter(&i2c_dev->adapter);
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return 0;
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}
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static const struct of_device_id bcm2835_i2c_of_match[] = {
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{ .compatible = "brcm,bcm2835-i2c" },
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{},
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};
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MODULE_DEVICE_TABLE(of, bcm2835_i2c_of_match);
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static struct platform_driver bcm2835_i2c_driver = {
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.probe = bcm2835_i2c_probe,
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.remove = bcm2835_i2c_remove,
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.driver = {
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.name = "i2c-bcm2835",
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.owner = THIS_MODULE,
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.of_match_table = bcm2835_i2c_of_match,
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},
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};
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module_platform_driver(bcm2835_i2c_driver);
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MODULE_AUTHOR("Stephen Warren <swarren@wwwdotorg.org>");
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MODULE_DESCRIPTION("BCM2835 I2C bus adapter");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:i2c-bcm2835");
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