net: dsa: mv88e6xxx: combine port_set_speed and port_set_duplex
Setting the speed independently of duplex makes little sense; the two parameters result from negotiation or fixed setup, and may have inter- dependencies. Moreover, they are always controlled via the same register - having them split means we have to read-modify-write this register twice. Combine the two operations into a single port_set_speed_duplex() operation. Not only is this more efficient, it reduces the size of the code as well. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
7e0e624312
commit
f365c6f723
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@ -452,8 +452,9 @@ static int mv88e6xxx_port_setup_mac(struct mv88e6xxx_chip *chip, int port,
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if (err)
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return err;
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if (chip->info->ops->port_set_speed) {
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err = chip->info->ops->port_set_speed(chip, port, speed);
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if (chip->info->ops->port_set_speed_duplex) {
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err = chip->info->ops->port_set_speed_duplex(chip, port,
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speed, duplex);
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if (err && err != -EOPNOTSUPP)
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goto restore_link;
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}
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@ -467,12 +468,6 @@ static int mv88e6xxx_port_setup_mac(struct mv88e6xxx_chip *chip, int port,
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goto restore_link;
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}
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if (chip->info->ops->port_set_duplex) {
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err = chip->info->ops->port_set_duplex(chip, port, duplex);
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if (err && err != -EOPNOTSUPP)
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goto restore_link;
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}
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err = mv88e6xxx_port_config_interface(chip, port, mode);
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restore_link:
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if (chip->info->ops->port_set_link(chip, port, link))
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@ -762,14 +757,9 @@ static void mv88e6xxx_mac_link_up(struct dsa_switch *ds, int port,
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if (err)
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goto error;
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if (ops->port_set_speed) {
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err = ops->port_set_speed(chip, port, speed);
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if (err && err != -EOPNOTSUPP)
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goto error;
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}
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if (ops->port_set_duplex) {
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err = ops->port_set_duplex(chip, port, duplex);
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if (ops->port_set_speed_duplex) {
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err = ops->port_set_speed_duplex(chip, port,
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speed, duplex);
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if (err && err != -EOPNOTSUPP)
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goto error;
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}
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@ -3412,8 +3402,7 @@ static const struct mv88e6xxx_ops mv88e6085_ops = {
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.phy_read = mv88e6185_phy_ppu_read,
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.phy_write = mv88e6185_phy_ppu_write,
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.port_set_link = mv88e6xxx_port_set_link,
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.port_set_duplex = mv88e6xxx_port_set_duplex,
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.port_set_speed = mv88e6185_port_set_speed,
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.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,
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.port_tag_remap = mv88e6095_port_tag_remap,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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.port_set_egress_floods = mv88e6352_port_set_egress_floods,
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@ -3452,8 +3441,7 @@ static const struct mv88e6xxx_ops mv88e6095_ops = {
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.phy_read = mv88e6185_phy_ppu_read,
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.phy_write = mv88e6185_phy_ppu_write,
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.port_set_link = mv88e6xxx_port_set_link,
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.port_set_duplex = mv88e6xxx_port_set_duplex,
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.port_set_speed = mv88e6185_port_set_speed,
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.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,
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.port_set_frame_mode = mv88e6085_port_set_frame_mode,
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.port_set_egress_floods = mv88e6185_port_set_egress_floods,
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.port_set_upstream_port = mv88e6095_port_set_upstream_port,
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@ -3483,8 +3471,7 @@ static const struct mv88e6xxx_ops mv88e6097_ops = {
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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.port_set_link = mv88e6xxx_port_set_link,
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.port_set_duplex = mv88e6xxx_port_set_duplex,
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.port_set_speed = mv88e6185_port_set_speed,
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.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,
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.port_tag_remap = mv88e6095_port_tag_remap,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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.port_set_egress_floods = mv88e6352_port_set_egress_floods,
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@ -3523,8 +3510,7 @@ static const struct mv88e6xxx_ops mv88e6123_ops = {
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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.port_set_link = mv88e6xxx_port_set_link,
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.port_set_duplex = mv88e6xxx_port_set_duplex,
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.port_set_speed = mv88e6185_port_set_speed,
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.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,
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.port_set_frame_mode = mv88e6085_port_set_frame_mode,
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.port_set_egress_floods = mv88e6352_port_set_egress_floods,
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.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
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@ -3558,8 +3544,7 @@ static const struct mv88e6xxx_ops mv88e6131_ops = {
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.phy_read = mv88e6185_phy_ppu_read,
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.phy_write = mv88e6185_phy_ppu_write,
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.port_set_link = mv88e6xxx_port_set_link,
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.port_set_duplex = mv88e6xxx_port_set_duplex,
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.port_set_speed = mv88e6185_port_set_speed,
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.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,
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.port_tag_remap = mv88e6095_port_tag_remap,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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.port_set_egress_floods = mv88e6185_port_set_egress_floods,
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@ -3601,9 +3586,8 @@ static const struct mv88e6xxx_ops mv88e6141_ops = {
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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.port_set_link = mv88e6xxx_port_set_link,
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.port_set_duplex = mv88e6xxx_port_set_duplex,
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.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
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.port_set_speed = mv88e6341_port_set_speed,
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.port_set_speed_duplex = mv88e6341_port_set_speed_duplex,
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.port_max_speed_mode = mv88e6341_port_max_speed_mode,
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.port_tag_remap = mv88e6095_port_tag_remap,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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@ -3654,8 +3638,7 @@ static const struct mv88e6xxx_ops mv88e6161_ops = {
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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.port_set_link = mv88e6xxx_port_set_link,
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.port_set_duplex = mv88e6xxx_port_set_duplex,
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.port_set_speed = mv88e6185_port_set_speed,
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.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,
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.port_tag_remap = mv88e6095_port_tag_remap,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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.port_set_egress_floods = mv88e6352_port_set_egress_floods,
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@ -3697,8 +3680,7 @@ static const struct mv88e6xxx_ops mv88e6165_ops = {
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.phy_read = mv88e6165_phy_read,
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.phy_write = mv88e6165_phy_write,
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.port_set_link = mv88e6xxx_port_set_link,
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.port_set_duplex = mv88e6xxx_port_set_duplex,
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.port_set_speed = mv88e6185_port_set_speed,
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.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,
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.port_disable_learn_limit = mv88e6xxx_port_disable_learn_limit,
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.port_disable_pri_override = mv88e6xxx_port_disable_pri_override,
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.port_link_state = mv88e6352_port_link_state,
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@ -3733,9 +3715,8 @@ static const struct mv88e6xxx_ops mv88e6171_ops = {
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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.port_set_link = mv88e6xxx_port_set_link,
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.port_set_duplex = mv88e6xxx_port_set_duplex,
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.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
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.port_set_speed = mv88e6185_port_set_speed,
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.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,
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.port_tag_remap = mv88e6095_port_tag_remap,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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.port_set_egress_floods = mv88e6352_port_set_egress_floods,
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@ -3777,9 +3758,8 @@ static const struct mv88e6xxx_ops mv88e6172_ops = {
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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.port_set_link = mv88e6xxx_port_set_link,
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.port_set_duplex = mv88e6xxx_port_set_duplex,
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.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
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.port_set_speed = mv88e6352_port_set_speed,
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.port_set_speed_duplex = mv88e6352_port_set_speed_duplex,
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.port_tag_remap = mv88e6095_port_tag_remap,
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.port_set_policy = mv88e6352_port_set_policy,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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@ -3830,9 +3810,8 @@ static const struct mv88e6xxx_ops mv88e6175_ops = {
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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.port_set_link = mv88e6xxx_port_set_link,
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.port_set_duplex = mv88e6xxx_port_set_duplex,
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.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
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.port_set_speed = mv88e6185_port_set_speed,
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.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,
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.port_tag_remap = mv88e6095_port_tag_remap,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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.port_set_egress_floods = mv88e6352_port_set_egress_floods,
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@ -3874,9 +3853,8 @@ static const struct mv88e6xxx_ops mv88e6176_ops = {
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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.port_set_link = mv88e6xxx_port_set_link,
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.port_set_duplex = mv88e6xxx_port_set_duplex,
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.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
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.port_set_speed = mv88e6352_port_set_speed,
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.port_set_speed_duplex = mv88e6352_port_set_speed_duplex,
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.port_tag_remap = mv88e6095_port_tag_remap,
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.port_set_policy = mv88e6352_port_set_policy,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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@ -3929,8 +3907,7 @@ static const struct mv88e6xxx_ops mv88e6185_ops = {
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.phy_read = mv88e6185_phy_ppu_read,
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.phy_write = mv88e6185_phy_ppu_write,
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.port_set_link = mv88e6xxx_port_set_link,
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.port_set_duplex = mv88e6xxx_port_set_duplex,
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.port_set_speed = mv88e6185_port_set_speed,
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.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,
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.port_set_frame_mode = mv88e6085_port_set_frame_mode,
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.port_set_egress_floods = mv88e6185_port_set_egress_floods,
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.port_egress_rate_limiting = mv88e6095_port_egress_rate_limiting,
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@ -3967,9 +3944,8 @@ static const struct mv88e6xxx_ops mv88e6190_ops = {
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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.port_set_link = mv88e6xxx_port_set_link,
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.port_set_duplex = mv88e6xxx_port_set_duplex,
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.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
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.port_set_speed = mv88e6390_port_set_speed,
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.port_set_speed_duplex = mv88e6390_port_set_speed_duplex,
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.port_max_speed_mode = mv88e6390_port_max_speed_mode,
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.port_tag_remap = mv88e6390_port_tag_remap,
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.port_set_policy = mv88e6352_port_set_policy,
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@ -4028,9 +4004,8 @@ static const struct mv88e6xxx_ops mv88e6190x_ops = {
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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.port_set_link = mv88e6xxx_port_set_link,
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.port_set_duplex = mv88e6xxx_port_set_duplex,
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.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
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.port_set_speed = mv88e6390x_port_set_speed,
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.port_set_speed_duplex = mv88e6390x_port_set_speed_duplex,
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.port_max_speed_mode = mv88e6390x_port_max_speed_mode,
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.port_tag_remap = mv88e6390_port_tag_remap,
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.port_set_policy = mv88e6352_port_set_policy,
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@ -4089,9 +4064,8 @@ static const struct mv88e6xxx_ops mv88e6191_ops = {
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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.port_set_link = mv88e6xxx_port_set_link,
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.port_set_duplex = mv88e6xxx_port_set_duplex,
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.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
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.port_set_speed = mv88e6390_port_set_speed,
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.port_set_speed_duplex = mv88e6390_port_set_speed_duplex,
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.port_max_speed_mode = mv88e6390_port_max_speed_mode,
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.port_tag_remap = mv88e6390_port_tag_remap,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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@ -4151,9 +4125,8 @@ static const struct mv88e6xxx_ops mv88e6240_ops = {
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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.port_set_link = mv88e6xxx_port_set_link,
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.port_set_duplex = mv88e6xxx_port_set_duplex,
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.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
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.port_set_speed = mv88e6352_port_set_speed,
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.port_set_speed_duplex = mv88e6352_port_set_speed_duplex,
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.port_tag_remap = mv88e6095_port_tag_remap,
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.port_set_policy = mv88e6352_port_set_policy,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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@ -4211,9 +4184,8 @@ static const struct mv88e6xxx_ops mv88e6250_ops = {
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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.port_set_link = mv88e6xxx_port_set_link,
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.port_set_duplex = mv88e6xxx_port_set_duplex,
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.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
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.port_set_speed = mv88e6250_port_set_speed,
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.port_set_speed_duplex = mv88e6250_port_set_speed_duplex,
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.port_tag_remap = mv88e6095_port_tag_remap,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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.port_set_egress_floods = mv88e6352_port_set_egress_floods,
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@ -4250,9 +4222,8 @@ static const struct mv88e6xxx_ops mv88e6290_ops = {
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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.port_set_link = mv88e6xxx_port_set_link,
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.port_set_duplex = mv88e6xxx_port_set_duplex,
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.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
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.port_set_speed = mv88e6390_port_set_speed,
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.port_set_speed_duplex = mv88e6390_port_set_speed_duplex,
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.port_max_speed_mode = mv88e6390_port_max_speed_mode,
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.port_tag_remap = mv88e6390_port_tag_remap,
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.port_set_policy = mv88e6352_port_set_policy,
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@ -4314,8 +4285,7 @@ static const struct mv88e6xxx_ops mv88e6320_ops = {
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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.port_set_link = mv88e6xxx_port_set_link,
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.port_set_duplex = mv88e6xxx_port_set_duplex,
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.port_set_speed = mv88e6185_port_set_speed,
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.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,
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.port_tag_remap = mv88e6095_port_tag_remap,
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.port_set_frame_mode = mv88e6351_port_set_frame_mode,
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.port_set_egress_floods = mv88e6352_port_set_egress_floods,
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@ -4358,8 +4328,7 @@ static const struct mv88e6xxx_ops mv88e6321_ops = {
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.phy_read = mv88e6xxx_g2_smi_phy_read,
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.phy_write = mv88e6xxx_g2_smi_phy_write,
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.port_set_link = mv88e6xxx_port_set_link,
|
||||
.port_set_duplex = mv88e6xxx_port_set_duplex,
|
||||
.port_set_speed = mv88e6185_port_set_speed,
|
||||
.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,
|
||||
.port_tag_remap = mv88e6095_port_tag_remap,
|
||||
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
|
||||
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
|
||||
|
@ -4400,9 +4369,8 @@ static const struct mv88e6xxx_ops mv88e6341_ops = {
|
|||
.phy_read = mv88e6xxx_g2_smi_phy_read,
|
||||
.phy_write = mv88e6xxx_g2_smi_phy_write,
|
||||
.port_set_link = mv88e6xxx_port_set_link,
|
||||
.port_set_duplex = mv88e6xxx_port_set_duplex,
|
||||
.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
|
||||
.port_set_speed = mv88e6341_port_set_speed,
|
||||
.port_set_speed_duplex = mv88e6341_port_set_speed_duplex,
|
||||
.port_max_speed_mode = mv88e6341_port_max_speed_mode,
|
||||
.port_tag_remap = mv88e6095_port_tag_remap,
|
||||
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
|
||||
|
@ -4455,9 +4423,8 @@ static const struct mv88e6xxx_ops mv88e6350_ops = {
|
|||
.phy_read = mv88e6xxx_g2_smi_phy_read,
|
||||
.phy_write = mv88e6xxx_g2_smi_phy_write,
|
||||
.port_set_link = mv88e6xxx_port_set_link,
|
||||
.port_set_duplex = mv88e6xxx_port_set_duplex,
|
||||
.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
|
||||
.port_set_speed = mv88e6185_port_set_speed,
|
||||
.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,
|
||||
.port_tag_remap = mv88e6095_port_tag_remap,
|
||||
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
|
||||
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
|
||||
|
@ -4497,9 +4464,8 @@ static const struct mv88e6xxx_ops mv88e6351_ops = {
|
|||
.phy_read = mv88e6xxx_g2_smi_phy_read,
|
||||
.phy_write = mv88e6xxx_g2_smi_phy_write,
|
||||
.port_set_link = mv88e6xxx_port_set_link,
|
||||
.port_set_duplex = mv88e6xxx_port_set_duplex,
|
||||
.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
|
||||
.port_set_speed = mv88e6185_port_set_speed,
|
||||
.port_set_speed_duplex = mv88e6185_port_set_speed_duplex,
|
||||
.port_tag_remap = mv88e6095_port_tag_remap,
|
||||
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
|
||||
.port_set_egress_floods = mv88e6352_port_set_egress_floods,
|
||||
|
@ -4543,9 +4509,8 @@ static const struct mv88e6xxx_ops mv88e6352_ops = {
|
|||
.phy_read = mv88e6xxx_g2_smi_phy_read,
|
||||
.phy_write = mv88e6xxx_g2_smi_phy_write,
|
||||
.port_set_link = mv88e6xxx_port_set_link,
|
||||
.port_set_duplex = mv88e6xxx_port_set_duplex,
|
||||
.port_set_rgmii_delay = mv88e6352_port_set_rgmii_delay,
|
||||
.port_set_speed = mv88e6352_port_set_speed,
|
||||
.port_set_speed_duplex = mv88e6352_port_set_speed_duplex,
|
||||
.port_tag_remap = mv88e6095_port_tag_remap,
|
||||
.port_set_policy = mv88e6352_port_set_policy,
|
||||
.port_set_frame_mode = mv88e6351_port_set_frame_mode,
|
||||
|
@ -4605,9 +4570,8 @@ static const struct mv88e6xxx_ops mv88e6390_ops = {
|
|||
.phy_read = mv88e6xxx_g2_smi_phy_read,
|
||||
.phy_write = mv88e6xxx_g2_smi_phy_write,
|
||||
.port_set_link = mv88e6xxx_port_set_link,
|
||||
.port_set_duplex = mv88e6xxx_port_set_duplex,
|
||||
.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
|
||||
.port_set_speed = mv88e6390_port_set_speed,
|
||||
.port_set_speed_duplex = mv88e6390_port_set_speed_duplex,
|
||||
.port_max_speed_mode = mv88e6390_port_max_speed_mode,
|
||||
.port_tag_remap = mv88e6390_port_tag_remap,
|
||||
.port_set_policy = mv88e6352_port_set_policy,
|
||||
|
@ -4670,9 +4634,8 @@ static const struct mv88e6xxx_ops mv88e6390x_ops = {
|
|||
.phy_read = mv88e6xxx_g2_smi_phy_read,
|
||||
.phy_write = mv88e6xxx_g2_smi_phy_write,
|
||||
.port_set_link = mv88e6xxx_port_set_link,
|
||||
.port_set_duplex = mv88e6xxx_port_set_duplex,
|
||||
.port_set_rgmii_delay = mv88e6390_port_set_rgmii_delay,
|
||||
.port_set_speed = mv88e6390x_port_set_speed,
|
||||
.port_set_speed_duplex = mv88e6390x_port_set_speed_duplex,
|
||||
.port_max_speed_mode = mv88e6390x_port_max_speed_mode,
|
||||
.port_tag_remap = mv88e6390_port_tag_remap,
|
||||
.port_set_policy = mv88e6352_port_set_policy,
|
||||
|
|
|
@ -399,15 +399,6 @@ struct mv88e6xxx_ops {
|
|||
*/
|
||||
int (*port_set_link)(struct mv88e6xxx_chip *chip, int port, int link);
|
||||
|
||||
#define DUPLEX_UNFORCED -2
|
||||
|
||||
/* Port's MAC duplex mode
|
||||
*
|
||||
* Use DUPLEX_HALF or DUPLEX_FULL to force half or full duplex,
|
||||
* or DUPLEX_UNFORCED for normal duplex detection.
|
||||
*/
|
||||
int (*port_set_duplex)(struct mv88e6xxx_chip *chip, int port, int dup);
|
||||
|
||||
#define PAUSE_ON 1
|
||||
#define PAUSE_OFF 0
|
||||
|
||||
|
@ -417,13 +408,18 @@ struct mv88e6xxx_ops {
|
|||
|
||||
#define SPEED_MAX INT_MAX
|
||||
#define SPEED_UNFORCED -2
|
||||
#define DUPLEX_UNFORCED -2
|
||||
|
||||
/* Port's MAC speed (in Mbps)
|
||||
/* Port's MAC speed (in Mbps) and MAC duplex mode
|
||||
*
|
||||
* Depending on the chip, 10, 100, 200, 1000, 2500, 10000 are valid.
|
||||
* Use SPEED_UNFORCED for normal detection, SPEED_MAX for max value.
|
||||
*
|
||||
* Use DUPLEX_HALF or DUPLEX_FULL to force half or full duplex,
|
||||
* or DUPLEX_UNFORCED for normal duplex detection.
|
||||
*/
|
||||
int (*port_set_speed)(struct mv88e6xxx_chip *chip, int port, int speed);
|
||||
int (*port_set_speed_duplex)(struct mv88e6xxx_chip *chip, int port,
|
||||
int speed, int duplex);
|
||||
|
||||
/* What interface mode should be used for maximum speed? */
|
||||
phy_interface_t (*port_max_speed_mode)(int port);
|
||||
|
|
|
@ -162,46 +162,9 @@ int mv88e6xxx_port_set_link(struct mv88e6xxx_chip *chip, int port, int link)
|
|||
return 0;
|
||||
}
|
||||
|
||||
int mv88e6xxx_port_set_duplex(struct mv88e6xxx_chip *chip, int port, int dup)
|
||||
{
|
||||
u16 reg;
|
||||
int err;
|
||||
|
||||
err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_MAC_CTL, ®);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
reg &= ~(MV88E6XXX_PORT_MAC_CTL_FORCE_DUPLEX |
|
||||
MV88E6XXX_PORT_MAC_CTL_DUPLEX_FULL);
|
||||
|
||||
switch (dup) {
|
||||
case DUPLEX_HALF:
|
||||
reg |= MV88E6XXX_PORT_MAC_CTL_FORCE_DUPLEX;
|
||||
break;
|
||||
case DUPLEX_FULL:
|
||||
reg |= MV88E6XXX_PORT_MAC_CTL_FORCE_DUPLEX |
|
||||
MV88E6XXX_PORT_MAC_CTL_DUPLEX_FULL;
|
||||
break;
|
||||
case DUPLEX_UNFORCED:
|
||||
/* normal duplex detection */
|
||||
break;
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_MAC_CTL, reg);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
dev_dbg(chip->dev, "p%d: %s %s duplex\n", port,
|
||||
reg & MV88E6XXX_PORT_MAC_CTL_FORCE_DUPLEX ? "Force" : "Unforce",
|
||||
reg & MV88E6XXX_PORT_MAC_CTL_DUPLEX_FULL ? "full" : "half");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mv88e6xxx_port_set_speed(struct mv88e6xxx_chip *chip, int port,
|
||||
int speed, bool alt_bit, bool force_bit)
|
||||
static int mv88e6xxx_port_set_speed_duplex(struct mv88e6xxx_chip *chip,
|
||||
int port, int speed, bool alt_bit,
|
||||
bool force_bit, int duplex)
|
||||
{
|
||||
u16 reg, ctrl;
|
||||
int err;
|
||||
|
@ -239,11 +202,29 @@ static int mv88e6xxx_port_set_speed(struct mv88e6xxx_chip *chip, int port,
|
|||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
switch (duplex) {
|
||||
case DUPLEX_HALF:
|
||||
ctrl |= MV88E6XXX_PORT_MAC_CTL_FORCE_DUPLEX;
|
||||
break;
|
||||
case DUPLEX_FULL:
|
||||
ctrl |= MV88E6XXX_PORT_MAC_CTL_FORCE_DUPLEX |
|
||||
MV88E6XXX_PORT_MAC_CTL_DUPLEX_FULL;
|
||||
break;
|
||||
case DUPLEX_UNFORCED:
|
||||
/* normal duplex detection */
|
||||
break;
|
||||
default:
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_MAC_CTL, ®);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
reg &= ~MV88E6XXX_PORT_MAC_CTL_SPEED_MASK;
|
||||
reg &= ~(MV88E6XXX_PORT_MAC_CTL_SPEED_MASK |
|
||||
MV88E6XXX_PORT_MAC_CTL_FORCE_DUPLEX |
|
||||
MV88E6XXX_PORT_MAC_CTL_DUPLEX_FULL);
|
||||
|
||||
if (alt_bit)
|
||||
reg &= ~MV88E6390_PORT_MAC_CTL_ALTSPEED;
|
||||
if (force_bit) {
|
||||
|
@ -261,12 +242,16 @@ static int mv88e6xxx_port_set_speed(struct mv88e6xxx_chip *chip, int port,
|
|||
dev_dbg(chip->dev, "p%d: Speed set to %d Mbps\n", port, speed);
|
||||
else
|
||||
dev_dbg(chip->dev, "p%d: Speed unforced\n", port);
|
||||
dev_dbg(chip->dev, "p%d: %s %s duplex\n", port,
|
||||
reg & MV88E6XXX_PORT_MAC_CTL_FORCE_DUPLEX ? "Force" : "Unforce",
|
||||
reg & MV88E6XXX_PORT_MAC_CTL_DUPLEX_FULL ? "full" : "half");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Support 10, 100, 200 Mbps (e.g. 88E6065 family) */
|
||||
int mv88e6065_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed)
|
||||
int mv88e6065_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
|
||||
int speed, int duplex)
|
||||
{
|
||||
if (speed == SPEED_MAX)
|
||||
speed = 200;
|
||||
|
@ -275,11 +260,13 @@ int mv88e6065_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed)
|
|||
return -EOPNOTSUPP;
|
||||
|
||||
/* Setting 200 Mbps on port 0 to 3 selects 100 Mbps */
|
||||
return mv88e6xxx_port_set_speed(chip, port, speed, false, false);
|
||||
return mv88e6xxx_port_set_speed_duplex(chip, port, speed, false, false,
|
||||
duplex);
|
||||
}
|
||||
|
||||
/* Support 10, 100, 1000 Mbps (e.g. 88E6185 family) */
|
||||
int mv88e6185_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed)
|
||||
int mv88e6185_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
|
||||
int speed, int duplex)
|
||||
{
|
||||
if (speed == SPEED_MAX)
|
||||
speed = 1000;
|
||||
|
@ -287,11 +274,13 @@ int mv88e6185_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed)
|
|||
if (speed == 200 || speed > 1000)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
return mv88e6xxx_port_set_speed(chip, port, speed, false, false);
|
||||
return mv88e6xxx_port_set_speed_duplex(chip, port, speed, false, false,
|
||||
duplex);
|
||||
}
|
||||
|
||||
/* Support 10, 100 Mbps (e.g. 88E6250 family) */
|
||||
int mv88e6250_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed)
|
||||
int mv88e6250_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
|
||||
int speed, int duplex)
|
||||
{
|
||||
if (speed == SPEED_MAX)
|
||||
speed = 100;
|
||||
|
@ -299,11 +288,13 @@ int mv88e6250_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed)
|
|||
if (speed > 100)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
return mv88e6xxx_port_set_speed(chip, port, speed, false, false);
|
||||
return mv88e6xxx_port_set_speed_duplex(chip, port, speed, false, false,
|
||||
duplex);
|
||||
}
|
||||
|
||||
/* Support 10, 100, 200, 1000, 2500 Mbps (e.g. 88E6341) */
|
||||
int mv88e6341_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed)
|
||||
int mv88e6341_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
|
||||
int speed, int duplex)
|
||||
{
|
||||
if (speed == SPEED_MAX)
|
||||
speed = port < 5 ? 1000 : 2500;
|
||||
|
@ -317,7 +308,8 @@ int mv88e6341_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed)
|
|||
if (speed == 2500 && port < 5)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
return mv88e6xxx_port_set_speed(chip, port, speed, !port, true);
|
||||
return mv88e6xxx_port_set_speed_duplex(chip, port, speed, !port, true,
|
||||
duplex);
|
||||
}
|
||||
|
||||
phy_interface_t mv88e6341_port_max_speed_mode(int port)
|
||||
|
@ -329,7 +321,8 @@ phy_interface_t mv88e6341_port_max_speed_mode(int port)
|
|||
}
|
||||
|
||||
/* Support 10, 100, 200, 1000 Mbps (e.g. 88E6352 family) */
|
||||
int mv88e6352_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed)
|
||||
int mv88e6352_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
|
||||
int speed, int duplex)
|
||||
{
|
||||
if (speed == SPEED_MAX)
|
||||
speed = 1000;
|
||||
|
@ -340,11 +333,13 @@ int mv88e6352_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed)
|
|||
if (speed == 200 && port < 5)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
return mv88e6xxx_port_set_speed(chip, port, speed, true, false);
|
||||
return mv88e6xxx_port_set_speed_duplex(chip, port, speed, true, false,
|
||||
duplex);
|
||||
}
|
||||
|
||||
/* Support 10, 100, 200, 1000, 2500 Mbps (e.g. 88E6390) */
|
||||
int mv88e6390_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed)
|
||||
int mv88e6390_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
|
||||
int speed, int duplex)
|
||||
{
|
||||
if (speed == SPEED_MAX)
|
||||
speed = port < 9 ? 1000 : 2500;
|
||||
|
@ -358,7 +353,8 @@ int mv88e6390_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed)
|
|||
if (speed == 2500 && port < 9)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
return mv88e6xxx_port_set_speed(chip, port, speed, true, true);
|
||||
return mv88e6xxx_port_set_speed_duplex(chip, port, speed, true, true,
|
||||
duplex);
|
||||
}
|
||||
|
||||
phy_interface_t mv88e6390_port_max_speed_mode(int port)
|
||||
|
@ -370,7 +366,8 @@ phy_interface_t mv88e6390_port_max_speed_mode(int port)
|
|||
}
|
||||
|
||||
/* Support 10, 100, 200, 1000, 2500, 10000 Mbps (e.g. 88E6190X) */
|
||||
int mv88e6390x_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed)
|
||||
int mv88e6390x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
|
||||
int speed, int duplex)
|
||||
{
|
||||
if (speed == SPEED_MAX)
|
||||
speed = port < 9 ? 1000 : 10000;
|
||||
|
@ -381,7 +378,8 @@ int mv88e6390x_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed)
|
|||
if (speed >= 2500 && port < 9)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
return mv88e6xxx_port_set_speed(chip, port, speed, true, true);
|
||||
return mv88e6xxx_port_set_speed_duplex(chip, port, speed, true, true,
|
||||
duplex);
|
||||
}
|
||||
|
||||
phy_interface_t mv88e6390x_port_max_speed_mode(int port)
|
||||
|
|
|
@ -298,15 +298,20 @@ int mv88e6390_port_set_rgmii_delay(struct mv88e6xxx_chip *chip, int port,
|
|||
|
||||
int mv88e6xxx_port_set_link(struct mv88e6xxx_chip *chip, int port, int link);
|
||||
|
||||
int mv88e6xxx_port_set_duplex(struct mv88e6xxx_chip *chip, int port, int dup);
|
||||
|
||||
int mv88e6065_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
|
||||
int mv88e6185_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
|
||||
int mv88e6250_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
|
||||
int mv88e6341_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
|
||||
int mv88e6352_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
|
||||
int mv88e6390_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
|
||||
int mv88e6390x_port_set_speed(struct mv88e6xxx_chip *chip, int port, int speed);
|
||||
int mv88e6065_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
|
||||
int speed, int duplex);
|
||||
int mv88e6185_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
|
||||
int speed, int duplex);
|
||||
int mv88e6250_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
|
||||
int speed, int duplex);
|
||||
int mv88e6341_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
|
||||
int speed, int duplex);
|
||||
int mv88e6352_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
|
||||
int speed, int duplex);
|
||||
int mv88e6390_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
|
||||
int speed, int duplex);
|
||||
int mv88e6390x_port_set_speed_duplex(struct mv88e6xxx_chip *chip, int port,
|
||||
int speed, int duplex);
|
||||
|
||||
phy_interface_t mv88e6341_port_max_speed_mode(int port);
|
||||
phy_interface_t mv88e6390_port_max_speed_mode(int port);
|
||||
|
|
Loading…
Reference in New Issue