IOMMU Fixes for Linux v5.14-rc1
Including: - Revert a patch which caused boot failures with QCOM IOMMU - Two fixes for Intel VT-d context table handling - Physical address decoding fix for Rockchip IOMMU - Add a reviewer for AMD IOMMU -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEr9jSbILcajRFYWYyK/BELZcBGuMFAmDv7NwACgkQK/BELZcB GuPu4hAA4vBoPD9fyO1U96tRu3tFchLIF/BmmOo9PWTcCAZ1MzcI35aHxKUZBApa HLsLRiH/knTrGwTcHwPMOjyDfWb/PuM00/x43FwNn/0wIjsw0Bp/jfXgTIzoQnkZ 7QVYNvDt7TWor19kfVLCjdlBwJAr26wXjUUCODq53OHJXMXlrA8Fj1XSC4St0SsL MAkowvOXJO/Ibly9jjoxnjkbXw7v0I2TklH+oM3zdo+GaLozSTztkwqbJ6zicZee AoITGjpVk69VGKbHOR+WJeeJIU9thIWisFL1HkWO4EWh+Ze2rmzVzjdBfXLABYL0 T1DFiQdpPN1+WsWxcoA15UOnSJtrLc+VjZi7/ncRXCyWyZZjOMLWVomgT3fXDwqw 8rUJAYKARALeBA8fSMnPjuzzPGXPhIw0RQXsd7VyGBYMRHhSzj1NRBsdgFl+vcb6 +FixorSsQx0C2w7/m/qF4INzxP/r7B4n+yL2m+nIYzmGJLngTE7yIdFsslHu2r5G etiQCtoptpp+LlvRNuA4YxJkxrtYHQN3YyVK4gL3SG59QZmuMcvVkomsTUHM92HN L8fhfcBQwG8Gpcjovm6isMkqEmunfb3LwiJj2/RHnlGf8mvVjHV9vzaW3DFB0ieB +reRv4T52VDoYPdiv5irDV8J19Z/HMv8+AkoR1GHt7G4uNutFk4= =l9Jd -----END PGP SIGNATURE----- Merge tag 'iommu-fixes-v5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull iommu fixes from Joerg Roedel: - Revert a patch which caused boot failures with QCOM IOMMU - Two fixes for Intel VT-d context table handling - Physical address decoding fix for Rockchip IOMMU - Add a reviewer for AMD IOMMU * tag 'iommu-fixes-v5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: MAINTAINERS: Add Suravee Suthikulpanit as Reviewer for AMD IOMMU (AMD-Vi) iommu/rockchip: Fix physical address decoding iommu/vt-d: Fix clearing real DMA device's scalable-mode context entries iommu/vt-d: Global devTLB flush when present context entry changed iommu/qcom: Revert "iommu/arm: Cleanup resources in case of probe error path"
This commit is contained in:
commit
f3523a226d
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@ -933,6 +933,7 @@ F: drivers/video/fbdev/geode/
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AMD IOMMU (AMD-VI)
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M: Joerg Roedel <joro@8bytes.org>
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R: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
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L: iommu@lists.linux-foundation.org
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S: Maintained
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu.git
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@ -849,12 +849,10 @@ static int qcom_iommu_device_probe(struct platform_device *pdev)
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ret = iommu_device_register(&qcom_iommu->iommu, &qcom_iommu_ops, dev);
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if (ret) {
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dev_err(dev, "Failed to register iommu\n");
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goto err_sysfs_remove;
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return ret;
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}
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ret = bus_set_iommu(&platform_bus_type, &qcom_iommu_ops);
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if (ret)
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goto err_unregister_device;
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bus_set_iommu(&platform_bus_type, &qcom_iommu_ops);
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if (qcom_iommu->local_base) {
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pm_runtime_get_sync(dev);
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@ -863,13 +861,6 @@ static int qcom_iommu_device_probe(struct platform_device *pdev)
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}
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return 0;
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err_unregister_device:
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iommu_device_unregister(&qcom_iommu->iommu);
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err_sysfs_remove:
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iommu_device_sysfs_remove(&qcom_iommu->iommu);
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return ret;
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}
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static int qcom_iommu_device_remove(struct platform_device *pdev)
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@ -2429,10 +2429,11 @@ __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
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return 0;
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}
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static void domain_context_clear_one(struct intel_iommu *iommu, u8 bus, u8 devfn)
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static void domain_context_clear_one(struct device_domain_info *info, u8 bus, u8 devfn)
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{
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unsigned long flags;
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struct intel_iommu *iommu = info->iommu;
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struct context_entry *context;
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unsigned long flags;
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u16 did_old;
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if (!iommu)
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@ -2444,7 +2445,16 @@ static void domain_context_clear_one(struct intel_iommu *iommu, u8 bus, u8 devfn
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spin_unlock_irqrestore(&iommu->lock, flags);
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return;
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}
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did_old = context_domain_id(context);
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if (sm_supported(iommu)) {
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if (hw_pass_through && domain_type_is_si(info->domain))
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did_old = FLPT_DEFAULT_DID;
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else
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did_old = info->domain->iommu_did[iommu->seq_id];
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} else {
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did_old = context_domain_id(context);
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}
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context_clear_entry(context);
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__iommu_flush_cache(iommu, context, sizeof(*context));
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spin_unlock_irqrestore(&iommu->lock, flags);
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@ -2462,6 +2472,8 @@ static void domain_context_clear_one(struct intel_iommu *iommu, u8 bus, u8 devfn
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0,
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0,
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DMA_TLB_DSI_FLUSH);
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__iommu_flush_dev_iotlb(info, 0, MAX_AGAW_PFN_WIDTH);
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}
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static inline void unlink_domain_info(struct device_domain_info *info)
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@ -4425,9 +4437,9 @@ out_free_dmar:
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static int domain_context_clear_one_cb(struct pci_dev *pdev, u16 alias, void *opaque)
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{
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struct intel_iommu *iommu = opaque;
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struct device_domain_info *info = opaque;
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domain_context_clear_one(iommu, PCI_BUS_NUM(alias), alias & 0xff);
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domain_context_clear_one(info, PCI_BUS_NUM(alias), alias & 0xff);
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return 0;
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}
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@ -4437,12 +4449,13 @@ static int domain_context_clear_one_cb(struct pci_dev *pdev, u16 alias, void *op
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* devices, unbinding the driver from any one of them will possibly leave
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* the others unable to operate.
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*/
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static void domain_context_clear(struct intel_iommu *iommu, struct device *dev)
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static void domain_context_clear(struct device_domain_info *info)
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{
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if (!iommu || !dev || !dev_is_pci(dev))
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if (!info->iommu || !info->dev || !dev_is_pci(info->dev))
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return;
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pci_for_each_dma_alias(to_pci_dev(dev), &domain_context_clear_one_cb, iommu);
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pci_for_each_dma_alias(to_pci_dev(info->dev),
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&domain_context_clear_one_cb, info);
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}
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static void __dmar_remove_one_dev_info(struct device_domain_info *info)
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@ -4459,14 +4472,13 @@ static void __dmar_remove_one_dev_info(struct device_domain_info *info)
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iommu = info->iommu;
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domain = info->domain;
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if (info->dev) {
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if (info->dev && !dev_is_real_dma_subdevice(info->dev)) {
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if (dev_is_pci(info->dev) && sm_supported(iommu))
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intel_pasid_tear_down_entry(iommu, info->dev,
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PASID_RID2PASID, false);
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iommu_disable_dev_iotlb(info);
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if (!dev_is_real_dma_subdevice(info->dev))
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domain_context_clear(iommu, info->dev);
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domain_context_clear(info);
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intel_pasid_free_table(info->dev);
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}
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@ -544,12 +544,14 @@ static inline u32 rk_dma_addr_dte(dma_addr_t dt_dma)
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}
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#define DT_HI_MASK GENMASK_ULL(39, 32)
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#define DTE_BASE_HI_MASK GENMASK(11, 4)
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#define DT_SHIFT 28
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static inline phys_addr_t rk_dte_addr_phys_v2(u32 addr)
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{
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return (phys_addr_t)(addr & RK_DTE_PT_ADDRESS_MASK) |
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((addr & DT_HI_MASK) << DT_SHIFT);
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u64 addr64 = addr;
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return (phys_addr_t)(addr64 & RK_DTE_PT_ADDRESS_MASK) |
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((addr64 & DTE_BASE_HI_MASK) << DT_SHIFT);
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}
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static inline u32 rk_dma_addr_dte_v2(dma_addr_t dt_dma)
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