drm/amdgpu: add optional fence out-parameter to amdgpu_vm_clear_freed
We will add the fence to freed buffer objects in a later commit, to ensure that the underlying memory can only be re-used after all references in page tables have been cleared. Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -785,7 +785,7 @@ static int amdgpu_bo_vm_update_pte(struct amdgpu_cs_parser *p)
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if (r)
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return r;
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r = amdgpu_vm_clear_freed(adev, vm);
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r = amdgpu_vm_clear_freed(adev, vm, NULL);
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if (r)
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return r;
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@ -540,7 +540,7 @@ static void amdgpu_gem_va_update_vm(struct amdgpu_device *adev,
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if (r)
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goto error;
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r = amdgpu_vm_clear_freed(adev, vm);
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r = amdgpu_vm_clear_freed(adev, vm, NULL);
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if (r)
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goto error;
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@ -1382,6 +1382,8 @@ static void amdgpu_vm_prt_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm)
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*
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* @adev: amdgpu_device pointer
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* @vm: requested vm
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* @fence: optional resulting fence (unchanged if no work needed to be done
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* or if an error occurred)
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*
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* Make sure all freed BOs are cleared in the PT.
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* Returns 0 for success.
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@ -1389,10 +1391,11 @@ static void amdgpu_vm_prt_fini(struct amdgpu_device *adev, struct amdgpu_vm *vm)
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* PTs have to be reserved and mutex must be locked!
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*/
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int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
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struct amdgpu_vm *vm)
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struct amdgpu_vm *vm,
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struct dma_fence **fence)
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{
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struct amdgpu_bo_va_mapping *mapping;
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struct dma_fence *fence = NULL;
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struct dma_fence *f = NULL;
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int r;
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while (!list_empty(&vm->freed)) {
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@ -1401,15 +1404,21 @@ int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
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list_del(&mapping->list);
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r = amdgpu_vm_bo_split_mapping(adev, NULL, 0, NULL, vm, mapping,
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0, 0, &fence);
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amdgpu_vm_free_mapping(adev, vm, mapping, fence);
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0, 0, &f);
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amdgpu_vm_free_mapping(adev, vm, mapping, f);
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if (r) {
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dma_fence_put(fence);
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dma_fence_put(f);
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return r;
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}
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}
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dma_fence_put(fence);
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if (fence && f) {
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dma_fence_put(*fence);
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*fence = f;
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} else {
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dma_fence_put(f);
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}
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return 0;
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}
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@ -190,7 +190,8 @@ void amdgpu_vm_reset_id(struct amdgpu_device *adev, unsigned vm_id);
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int amdgpu_vm_update_page_directory(struct amdgpu_device *adev,
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struct amdgpu_vm *vm);
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int amdgpu_vm_clear_freed(struct amdgpu_device *adev,
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struct amdgpu_vm *vm);
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struct amdgpu_vm *vm,
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struct dma_fence **fence);
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int amdgpu_vm_clear_invalids(struct amdgpu_device *adev, struct amdgpu_vm *vm,
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struct amdgpu_sync *sync);
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int amdgpu_vm_bo_update(struct amdgpu_device *adev,
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