x86: Make X86_BUG_FXSAVE_LEAK detectable in CPUID on AMD
[ Note, this is a Git cherry-pick of the following commit: 2b67799bdf25 ("x86: Make X86_BUG_FXSAVE_LEAK detectable in CPUID on AMD") ... for easier x86 PTI code testing and back-porting. ] The latest AMD AMD64 Architecture Programmer's Manual adds a CPUID feature XSaveErPtr (CPUID_Fn80000008_EBX[2]). If this feature is set, the FXSAVE, XSAVE, FXSAVEOPT, XSAVEC, XSAVES / FXRSTOR, XRSTOR, XRSTORS always save/restore error pointers, thus making the X86_BUG_FXSAVE_LEAK workaround obsolete on such CPUs. Signed-Off-By: Rudolf Marek <r.marek@assembler.cz> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Borislav Petkov <bp@suse.de> Tested-by: Borislav Petkov <bp@suse.de> Cc: Andy Lutomirski <luto@amacapital.net> Link: https://lkml.kernel.org/r/bdcebe90-62c5-1f05-083c-eba7f08b2540@assembler.cz Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -266,6 +266,7 @@
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/* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
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#define X86_FEATURE_CLZERO (13*32+ 0) /* CLZERO instruction */
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#define X86_FEATURE_IRPERF (13*32+ 1) /* Instructions Retired Count */
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#define X86_FEATURE_XSAVEERPTR (13*32+ 2) /* Always save/restore FP error pointers */
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/* Thermal and Power Management Leaf, CPUID level 0x00000006 (EAX), word 14 */
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#define X86_FEATURE_DTHERM (14*32+ 0) /* Digital Thermal Sensor */
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@ -804,8 +804,11 @@ static void init_amd(struct cpuinfo_x86 *c)
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case 0x17: init_amd_zn(c); break;
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}
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/* Enable workaround for FXSAVE leak */
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if (c->x86 >= 6)
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/*
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* Enable workaround for FXSAVE leak on CPUs
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* without a XSaveErPtr feature
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*/
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if ((c->x86 >= 6) && (!cpu_has(c, X86_FEATURE_XSAVEERPTR)))
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set_cpu_bug(c, X86_BUG_FXSAVE_LEAK);
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cpu_detect_cache_sizes(c);
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