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drm/amdgpu/mmsch: Correct the definition for mmsch init header 

For the header, it is version related, shouldn't use MAX_VCN_INSTANCES.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Emily Deng 2023-06-06 14:27:04 +08:00 committed by Alex Deucher
parent 8be2950467
commit f2bcc0c7db
4 changed files with 8 additions and 4 deletions
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4
drivers/gpu/drm/amd/amdgpu/mmsch_v3_0.h
View File

@ -30,6 +30,8 @@
#define MMSCH_VERSION_MINOR 0
#define MMSCH_VERSION (MMSCH_VERSION_MAJOR << 16 | MMSCH_VERSION_MINOR)
#define MMSCH_V3_0_VCN_INSTANCES 0x2
enum mmsch_v3_0_command_type {
MMSCH_COMMAND__DIRECT_REG_WRITE = 0,
MMSCH_COMMAND__DIRECT_REG_POLLING = 2,
@ -47,7 +49,7 @@ struct mmsch_v3_0_table_info {
struct mmsch_v3_0_init_header {
uint32_t version;
uint32_t total_size;
struct mmsch_v3_0_table_info inst[AMDGPU_MAX_VCN_INSTANCES];
struct mmsch_v3_0_table_info inst[MMSCH_V3_0_VCN_INSTANCES];
};
struct mmsch_v3_0_cmd_direct_reg_header {

4
drivers/gpu/drm/amd/amdgpu/mmsch_v4_0.h
View File

@ -43,6 +43,8 @@
#define MMSCH_VF_MAILBOX_RESP__OK 0x1
#define MMSCH_VF_MAILBOX_RESP__INCOMPLETE 0x2
#define MMSCH_V4_0_VCN_INSTANCES 0x2
enum mmsch_v4_0_command_type {
MMSCH_COMMAND__DIRECT_REG_WRITE = 0,
MMSCH_COMMAND__DIRECT_REG_POLLING = 2,
@ -60,7 +62,7 @@ struct mmsch_v4_0_table_info {
struct mmsch_v4_0_init_header {
uint32_t version;
uint32_t total_size;
struct mmsch_v4_0_table_info inst[AMDGPU_MAX_VCN_INSTANCES];
struct mmsch_v4_0_table_info inst[MMSCH_V4_0_VCN_INSTANCES];
struct mmsch_v4_0_table_info jpegdec;
};

2
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
View File

@ -1313,7 +1313,7 @@ static int vcn_v3_0_start_sriov(struct amdgpu_device *adev)
header.version = MMSCH_VERSION;
header.total_size = sizeof(struct mmsch_v3_0_init_header) >> 2;
for (i = 0; i < AMDGPU_MAX_VCN_INSTANCES; i++) {
for (i = 0; i < MMSCH_V3_0_VCN_INSTANCES; i++) {
header.inst[i].init_status = 0;
header.inst[i].table_offset = 0;
header.inst[i].table_size = 0;

2
drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
View File

@ -1239,7 +1239,7 @@ static int vcn_v4_0_start_sriov(struct amdgpu_device *adev)
header.version = MMSCH_VERSION;
header.total_size = sizeof(struct mmsch_v4_0_init_header) >> 2;
for (i = 0; i < AMDGPU_MAX_VCN_INSTANCES; i++) {
for (i = 0; i < MMSCH_V4_0_VCN_INSTANCES; i++) {
header.inst[i].init_status = 0;
header.inst[i].table_offset = 0;
header.inst[i].table_size = 0;