ASoC: Add MediaTek MT6660 Speaker Amp Driver
The MT6660 is a boosted BTL class-D amplifier with V/I sensing. A built-in DC-DC step-up converter is used to provide efficient power for class-D amplifier with multi-level class-G operation. The digital audio interface supports I2S, left-justified, right-justified, TDM and DSP A/B format for audio in with a data out used for chip information like voltage sense and current sense, which are able to be monitored via DATAO through proper Signed-off-by: Jeff Chang <jeff_chang@richtek.com> Link: https://lore.kernel.org/r/1579153597-23286-1-git-send-email-richtek.jeff.chang@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Jeff Chang
Mark Brown
parent
26aa19174f
commit
f289e55c6e
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@ -125,6 +125,7 @@ config SND_SOC_ALL_CODECS
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select SND_SOC_ML26124 if I2C
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select SND_SOC_MT6351 if MTK_PMIC_WRAP
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select SND_SOC_MT6358 if MTK_PMIC_WRAP
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select SND_SOC_MT6660 if I2C
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select SND_SOC_NAU8540 if I2C
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select SND_SOC_NAU8810 if I2C
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select SND_SOC_NAU8822 if I2C
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@ -1573,6 +1574,15 @@ config SND_SOC_MT6358
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Enable support for the platform which uses MT6358 as
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external codec device.
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config SND_SOC_MT6660
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tristate "Mediatek MT6660 Speaker Amplifier"
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depends on I2C
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help
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MediaTek MT6660 is a smart power amplifier which contain
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speaker protection, multi-band DRC, equalizer functions.
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Select N if you don't have MT6660 on board.
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Select M to build this as module.
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config SND_SOC_NAU8540
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tristate "Nuvoton Technology Corporation NAU85L40 CODEC"
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depends on I2C
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@ -123,6 +123,7 @@ snd-soc-msm8916-analog-objs := msm8916-wcd-analog.o
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snd-soc-msm8916-digital-objs := msm8916-wcd-digital.o
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snd-soc-mt6351-objs := mt6351.o
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snd-soc-mt6358-objs := mt6358.o
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snd-soc-mt6660-objs := mt6660.o
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snd-soc-nau8540-objs := nau8540.o
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snd-soc-nau8810-objs := nau8810.o
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snd-soc-nau8822-objs := nau8822.o
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@ -419,6 +420,7 @@ obj-$(CONFIG_SND_SOC_MSM8916_WCD_ANALOG) +=snd-soc-msm8916-analog.o
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obj-$(CONFIG_SND_SOC_MSM8916_WCD_DIGITAL) +=snd-soc-msm8916-digital.o
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obj-$(CONFIG_SND_SOC_MT6351) += snd-soc-mt6351.o
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obj-$(CONFIG_SND_SOC_MT6358) += snd-soc-mt6358.o
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obj-$(CONFIG_SND_SOC_MT6660) += snd-soc-mt6660.o
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obj-$(CONFIG_SND_SOC_NAU8540) += snd-soc-nau8540.o
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obj-$(CONFIG_SND_SOC_NAU8810) += snd-soc-nau8810.o
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obj-$(CONFIG_SND_SOC_NAU8822) += snd-soc-nau8822.o
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@ -0,0 +1,509 @@
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// SPDX-License-Identifier: GPL-2.0 //
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// Copyright (c) 2019 MediaTek Inc.
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/version.h>
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#include <linux/err.h>
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#include <linux/i2c.h>
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#include <linux/pm_runtime.h>
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#include <linux/delay.h>
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#include <linux/debugfs.h>
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#include <sound/soc.h>
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#include <sound/tlv.h>
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#include <sound/pcm_params.h>
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#include "mt6660.h"
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struct reg_size_table {
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u32 addr;
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u8 size;
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};
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static const struct reg_size_table mt6660_reg_size_table[] = {
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{ MT6660_REG_HPF1_COEF, 4 },
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{ MT6660_REG_HPF2_COEF, 4 },
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{ MT6660_REG_TDM_CFG3, 2 },
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{ MT6660_REG_RESV17, 2 },
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{ MT6660_REG_RESV23, 2 },
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{ MT6660_REG_SIGMAX, 2 },
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{ MT6660_REG_DEVID, 2 },
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{ MT6660_REG_HCLIP_CTRL, 2 },
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{ MT6660_REG_DA_GAIN, 2 },
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};
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static int mt6660_get_reg_size(uint32_t addr)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(mt6660_reg_size_table); i++) {
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if (mt6660_reg_size_table[i].addr == addr)
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return mt6660_reg_size_table[i].size;
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}
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return 1;
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}
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static int mt6660_reg_write(void *context, unsigned int reg, unsigned int val)
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{
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struct mt6660_chip *chip = context;
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int size = mt6660_get_reg_size(reg);
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u8 reg_data[4];
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int i, ret;
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for (i = 0; i < size; i++)
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reg_data[size - i - 1] = (val >> (8 * i)) & 0xff;
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ret = i2c_smbus_write_i2c_block_data(chip->i2c, reg, size, reg_data);
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return ret;
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}
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static int mt6660_reg_read(void *context, unsigned int reg, unsigned int *val)
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{
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struct mt6660_chip *chip = context;
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int size = mt6660_get_reg_size(reg);
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int i, ret;
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u8 data[4];
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u32 reg_data = 0;
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ret = i2c_smbus_read_i2c_block_data(chip->i2c, reg, size, data);
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if (ret < 0)
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return ret;
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for (i = 0; i < size; i++) {
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reg_data <<= 8;
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reg_data |= data[i];
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}
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*val = reg_data;
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return 0;
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}
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static const struct regmap_config mt6660_regmap_config = {
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.reg_bits = 8,
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.val_bits = 32,
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.reg_write = mt6660_reg_write,
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.reg_read = mt6660_reg_read,
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};
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static int mt6660_codec_dac_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event)
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{
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if (event == SND_SOC_DAPM_POST_PMU)
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usleep_range(1000, 1100);
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return 0;
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}
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static int mt6660_codec_classd_event(struct snd_soc_dapm_widget *w,
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struct snd_kcontrol *kcontrol, int event)
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{
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struct snd_soc_component *component =
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snd_soc_dapm_to_component(w->dapm);
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int ret;
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switch (event) {
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case SND_SOC_DAPM_PRE_PMU:
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dev_dbg(component->dev,
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"%s: before classd turn on\n", __func__);
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/* config to adaptive mode */
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ret = snd_soc_component_update_bits(component,
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MT6660_REG_BST_CTRL, 0x03, 0x03);
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if (ret < 0) {
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dev_err(component->dev, "config mode adaptive fail\n");
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return ret;
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}
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break;
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case SND_SOC_DAPM_POST_PMU:
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/* voltage sensing enable */
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ret = snd_soc_component_update_bits(component,
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MT6660_REG_RESV7, 0x04, 0x04);
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if (ret < 0) {
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dev_err(component->dev,
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"enable voltage sensing fail\n");
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return ret;
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}
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dev_dbg(component->dev, "Amp on\n");
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break;
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case SND_SOC_DAPM_PRE_PMD:
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dev_dbg(component->dev, "Amp off\n");
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/* voltage sensing disable */
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ret = snd_soc_component_update_bits(component,
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MT6660_REG_RESV7, 0x04, 0x00);
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if (ret < 0) {
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dev_err(component->dev,
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"disable voltage sensing fail\n");
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return ret;
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}
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/* pop-noise improvement 1 */
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ret = snd_soc_component_update_bits(component,
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MT6660_REG_RESV10, 0x10, 0x10);
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if (ret < 0) {
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dev_err(component->dev,
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"pop-noise improvement 1 fail\n");
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return ret;
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}
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break;
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case SND_SOC_DAPM_POST_PMD:
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dev_dbg(component->dev,
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"%s: after classd turn off\n", __func__);
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/* pop-noise improvement 2 */
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ret = snd_soc_component_update_bits(component,
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MT6660_REG_RESV10, 0x10, 0x00);
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if (ret < 0) {
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dev_err(component->dev,
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"pop-noise improvement 2 fail\n");
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return ret;
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}
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/* config to off mode */
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ret = snd_soc_component_update_bits(component,
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MT6660_REG_BST_CTRL, 0x03, 0x00);
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if (ret < 0) {
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dev_err(component->dev, "config mode off fail\n");
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return ret;
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}
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break;
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}
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return 0;
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}
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static const struct snd_soc_dapm_widget mt6660_component_dapm_widgets[] = {
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SND_SOC_DAPM_DAC_E("DAC", NULL, MT6660_REG_PLL_CFG1,
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0, 1, mt6660_codec_dac_event, SND_SOC_DAPM_POST_PMU),
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SND_SOC_DAPM_ADC("VI ADC", NULL, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_PGA("PGA", SND_SOC_NOPM, 0, 0, NULL, 0),
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SND_SOC_DAPM_OUT_DRV_E("ClassD", MT6660_REG_SYSTEM_CTRL, 2, 0,
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NULL, 0, mt6660_codec_classd_event,
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SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
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SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
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SND_SOC_DAPM_OUTPUT("OUTP"),
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SND_SOC_DAPM_OUTPUT("OUTN"),
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};
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static const struct snd_soc_dapm_route mt6660_component_dapm_routes[] = {
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{ "DAC", NULL, "aif_playback" },
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{ "PGA", NULL, "DAC" },
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{ "ClassD", NULL, "PGA" },
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{ "OUTP", NULL, "ClassD" },
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{ "OUTN", NULL, "ClassD" },
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{ "VI ADC", NULL, "ClassD" },
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{ "aif_capture", NULL, "VI ADC" },
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};
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static int mt6660_component_get_volsw(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *component =
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snd_soc_kcontrol_component(kcontrol);
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struct mt6660_chip *chip = (struct mt6660_chip *)
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snd_soc_component_get_drvdata(component);
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ucontrol->value.integer.value[0] = chip->chip_rev & 0x0f;
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return 0;
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}
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static const DECLARE_TLV_DB_SCALE(vol_ctl_tlv, -1155, 5, 0);
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static const struct snd_kcontrol_new mt6660_component_snd_controls[] = {
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SOC_SINGLE_TLV("Digital Volume", MT6660_REG_VOL_CTRL, 0, 255,
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1, vol_ctl_tlv),
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SOC_SINGLE("Hard Clip Switch", MT6660_REG_HCLIP_CTRL, 8, 1, 0),
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SOC_SINGLE("Clip Switch", MT6660_REG_SPS_CTRL, 0, 1, 0),
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SOC_SINGLE("Boost Mode", MT6660_REG_BST_CTRL, 0, 3, 0),
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SOC_SINGLE("DRE Switch", MT6660_REG_DRE_CTRL, 0, 1, 0),
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SOC_SINGLE("DC Protect Switch", MT6660_REG_DC_PROTECT_CTRL, 3, 1, 0),
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SOC_SINGLE("Data Output Left Channel Selection",
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MT6660_REG_DATAO_SEL, 3, 7, 0),
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SOC_SINGLE("Data Output Right Channel Selection",
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MT6660_REG_DATAO_SEL, 0, 7, 0),
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SOC_SINGLE_EXT("T0 SEL", MT6660_REG_CALI_T0, 0, 7, 0,
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snd_soc_get_volsw, NULL),
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SOC_SINGLE_EXT("Chip Rev", MT6660_REG_DEVID, 8, 15, 0,
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mt6660_component_get_volsw, NULL),
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};
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static int _mt6660_chip_power_on(struct mt6660_chip *chip, int on_off)
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{
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return regmap_write_bits(chip->regmap, MT6660_REG_SYSTEM_CTRL,
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0x01, on_off ? 0x00 : 0x01);
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}
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static int mt6660_component_probe(struct snd_soc_component *component)
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{
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struct mt6660_chip *chip = snd_soc_component_get_drvdata(component);
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dev_dbg(component->dev, "%s\n", __func__);
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snd_soc_component_init_regmap(component, chip->regmap);
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return 0;
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}
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static void mt6660_component_remove(struct snd_soc_component *component)
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{
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dev_dbg(component->dev, "%s\n", __func__);
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snd_soc_component_exit_regmap(component);
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}
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static const struct snd_soc_component_driver mt6660_component_driver = {
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.probe = mt6660_component_probe,
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.remove = mt6660_component_remove,
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.controls = mt6660_component_snd_controls,
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.num_controls = ARRAY_SIZE(mt6660_component_snd_controls),
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.dapm_widgets = mt6660_component_dapm_widgets,
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.num_dapm_widgets = ARRAY_SIZE(mt6660_component_dapm_widgets),
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.dapm_routes = mt6660_component_dapm_routes,
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.num_dapm_routes = ARRAY_SIZE(mt6660_component_dapm_routes),
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.idle_bias_on = false, /* idle_bias_off = true */
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};
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static int mt6660_component_aif_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *hw_params, struct snd_soc_dai *dai)
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{
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int word_len = params_physical_width(hw_params);
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int aud_bit = params_width(hw_params);
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u16 reg_data = 0;
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int ret;
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dev_dbg(dai->dev, "%s: ++\n", __func__);
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dev_dbg(dai->dev, "format: 0x%08x\n", params_format(hw_params));
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dev_dbg(dai->dev, "rate: 0x%08x\n", params_rate(hw_params));
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dev_dbg(dai->dev, "word_len: %d, aud_bit: %d\n", word_len, aud_bit);
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if (word_len > 32 || word_len < 16) {
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dev_err(dai->dev, "not supported word length\n");
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return -ENOTSUPP;
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}
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switch (aud_bit) {
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case 16:
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reg_data = 3;
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break;
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case 18:
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reg_data = 2;
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break;
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case 20:
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reg_data = 1;
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break;
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case 24:
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case 32:
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reg_data = 0;
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break;
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default:
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return -ENOTSUPP;
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}
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ret = snd_soc_component_update_bits(dai->component,
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MT6660_REG_SERIAL_CFG1, 0xc0, (reg_data << 6));
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if (ret < 0) {
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dev_err(dai->dev, "config aud bit fail\n");
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return ret;
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}
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ret = snd_soc_component_update_bits(dai->component,
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MT6660_REG_TDM_CFG3, 0x3f0, word_len << 4);
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if (ret < 0) {
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dev_err(dai->dev, "config word len fail\n");
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return ret;
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}
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dev_dbg(dai->dev, "%s: --\n", __func__);
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return 0;
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}
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static const struct snd_soc_dai_ops mt6660_component_aif_ops = {
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.hw_params = mt6660_component_aif_hw_params,
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};
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#define STUB_RATES SNDRV_PCM_RATE_8000_192000
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#define STUB_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_U16_LE | \
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SNDRV_PCM_FMTBIT_S24_LE | \
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SNDRV_PCM_FMTBIT_U24_LE | \
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SNDRV_PCM_FMTBIT_S32_LE | \
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SNDRV_PCM_FMTBIT_U32_LE)
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static struct snd_soc_dai_driver mt6660_codec_dai = {
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.name = "mt6660-aif",
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.playback = {
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.stream_name = "aif_playback",
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.channels_min = 1,
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.channels_max = 2,
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.rates = STUB_RATES,
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.formats = STUB_FORMATS,
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},
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.capture = {
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.stream_name = "aif_capture",
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.channels_min = 1,
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.channels_max = 2,
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.rates = STUB_RATES,
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.formats = STUB_FORMATS,
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},
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/* dai properties */
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.symmetric_rates = 1,
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.symmetric_channels = 1,
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.symmetric_samplebits = 1,
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/* dai operations */
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.ops = &mt6660_component_aif_ops,
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};
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static int _mt6660_chip_id_check(struct mt6660_chip *chip)
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{
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int ret;
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unsigned int val;
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ret = regmap_read(chip->regmap, MT6660_REG_DEVID, &val);
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if (ret < 0)
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return ret;
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val &= 0x0ff0;
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if (val != 0x00e0 && val != 0x01e0) {
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dev_err(chip->dev, "%s id(%x) not match\n", __func__, val);
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return -ENODEV;
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}
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return 0;
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}
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static int _mt6660_chip_sw_reset(struct mt6660_chip *chip)
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{
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int ret;
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/* turn on main pll first, then trigger reset */
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||||
ret = regmap_write(chip->regmap, MT6660_REG_SYSTEM_CTRL, 0x00);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
ret = regmap_write(chip->regmap, MT6660_REG_SYSTEM_CTRL, 0x80);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
msleep(30);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int _mt6660_read_chip_revision(struct mt6660_chip *chip)
|
||||
{
|
||||
int ret;
|
||||
unsigned int val;
|
||||
|
||||
ret = regmap_read(chip->regmap, MT6660_REG_DEVID, &val);
|
||||
if (ret < 0) {
|
||||
dev_err(chip->dev, "get chip revision fail\n");
|
||||
return ret;
|
||||
}
|
||||
chip->chip_rev = val&0xff;
|
||||
dev_info(chip->dev, "%s chip_rev = %x\n", __func__, chip->chip_rev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int mt6660_i2c_probe(struct i2c_client *client,
|
||||
const struct i2c_device_id *id)
|
||||
{
|
||||
struct mt6660_chip *chip = NULL;
|
||||
int ret;
|
||||
|
||||
dev_dbg(&client->dev, "%s\n", __func__);
|
||||
chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
|
||||
if (!chip)
|
||||
return -ENOMEM;
|
||||
chip->i2c = client;
|
||||
chip->dev = &client->dev;
|
||||
mutex_init(&chip->io_lock);
|
||||
i2c_set_clientdata(client, chip);
|
||||
|
||||
chip->regmap = devm_regmap_init(&client->dev,
|
||||
NULL, chip, &mt6660_regmap_config);
|
||||
if (IS_ERR(chip->regmap)) {
|
||||
ret = PTR_ERR(chip->regmap);
|
||||
dev_err(&client->dev, "failed to initialise regmap: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* chip reset first */
|
||||
ret = _mt6660_chip_sw_reset(chip);
|
||||
if (ret < 0) {
|
||||
dev_err(chip->dev, "chip reset fail\n");
|
||||
goto probe_fail;
|
||||
}
|
||||
/* chip power on */
|
||||
ret = _mt6660_chip_power_on(chip, 1);
|
||||
if (ret < 0) {
|
||||
dev_err(chip->dev, "chip power on 2 fail\n");
|
||||
goto probe_fail;
|
||||
}
|
||||
/* chip devid check */
|
||||
ret = _mt6660_chip_id_check(chip);
|
||||
if (ret < 0) {
|
||||
dev_err(chip->dev, "chip id check fail\n");
|
||||
goto probe_fail;
|
||||
}
|
||||
/* chip revision get */
|
||||
ret = _mt6660_read_chip_revision(chip);
|
||||
if (ret < 0) {
|
||||
dev_err(chip->dev, "read chip revision fail\n");
|
||||
goto probe_fail;
|
||||
}
|
||||
pm_runtime_set_active(chip->dev);
|
||||
pm_runtime_enable(chip->dev);
|
||||
|
||||
ret = devm_snd_soc_register_component(chip->dev,
|
||||
&mt6660_component_driver,
|
||||
&mt6660_codec_dai, 1);
|
||||
return ret;
|
||||
probe_fail:
|
||||
_mt6660_chip_power_on(chip, 0);
|
||||
mutex_destroy(&chip->io_lock);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int mt6660_i2c_remove(struct i2c_client *client)
|
||||
{
|
||||
struct mt6660_chip *chip = i2c_get_clientdata(client);
|
||||
|
||||
pm_runtime_disable(chip->dev);
|
||||
pm_runtime_set_suspended(chip->dev);
|
||||
mutex_destroy(&chip->io_lock);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __maybe_unused mt6660_i2c_runtime_suspend(struct device *dev)
|
||||
{
|
||||
struct mt6660_chip *chip = dev_get_drvdata(dev);
|
||||
|
||||
dev_dbg(dev, "enter low power mode\n");
|
||||
return regmap_update_bits(chip->regmap,
|
||||
MT6660_REG_SYSTEM_CTRL, 0x01, 0x01);
|
||||
}
|
||||
|
||||
static int __maybe_unused mt6660_i2c_runtime_resume(struct device *dev)
|
||||
{
|
||||
struct mt6660_chip *chip = dev_get_drvdata(dev);
|
||||
|
||||
dev_dbg(dev, "exit low power mode\n");
|
||||
return regmap_update_bits(chip->regmap,
|
||||
MT6660_REG_SYSTEM_CTRL, 0x01, 0x00);
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops mt6660_dev_pm_ops = {
|
||||
SET_RUNTIME_PM_OPS(mt6660_i2c_runtime_suspend,
|
||||
mt6660_i2c_runtime_resume, NULL)
|
||||
};
|
||||
|
||||
static const struct of_device_id __maybe_unused mt6660_of_id[] = {
|
||||
{ .compatible = "mediatek,mt6660",},
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, mt6660_of_id);
|
||||
|
||||
static const struct i2c_device_id mt6660_i2c_id[] = {
|
||||
{"mt6660", 0 },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(i2c, mt6660_i2c_id);
|
||||
|
||||
static struct i2c_driver mt6660_i2c_driver = {
|
||||
.driver = {
|
||||
.name = "mt6660",
|
||||
.of_match_table = of_match_ptr(mt6660_of_id),
|
||||
.pm = &mt6660_dev_pm_ops,
|
||||
},
|
||||
.probe = mt6660_i2c_probe,
|
||||
.remove = mt6660_i2c_remove,
|
||||
.id_table = mt6660_i2c_id,
|
||||
};
|
||||
module_i2c_driver(mt6660_i2c_driver);
|
||||
|
||||
MODULE_AUTHOR("Jeff Chang <jeff_chang@richtek.com>");
|
||||
MODULE_DESCRIPTION("MT6660 SPKAMP Driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_VERSION("1.0.7_G");
|
||||
|
|
@ -0,0 +1,77 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Copyright (c) 2019 MediaTek Inc.
|
||||
*/
|
||||
|
||||
#ifndef __SND_SOC_MT6660_H
|
||||
#define __SND_SOC_MT6660_H
|
||||
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/regmap.h>
|
||||
|
||||
#pragma pack(push, 1)
|
||||
struct mt6660_platform_data {
|
||||
u8 init_setting_num;
|
||||
u32 *init_setting_addr;
|
||||
u32 *init_setting_mask;
|
||||
u32 *init_setting_val;
|
||||
};
|
||||
|
||||
struct mt6660_chip {
|
||||
struct i2c_client *i2c;
|
||||
struct device *dev;
|
||||
struct platform_device *param_dev;
|
||||
struct mt6660_platform_data plat_data;
|
||||
struct mutex io_lock;
|
||||
struct regmap *regmap;
|
||||
u16 chip_rev;
|
||||
};
|
||||
#pragma pack(pop)
|
||||
|
||||
#define MT6660_REG_DEVID (0x00)
|
||||
#define MT6660_REG_SYSTEM_CTRL (0x03)
|
||||
#define MT6660_REG_IRQ_STATUS1 (0x05)
|
||||
#define MT6660_REG_ADDA_CLOCK (0x07)
|
||||
#define MT6660_REG_SERIAL_CFG1 (0x10)
|
||||
#define MT6660_REG_DATAO_SEL (0x12)
|
||||
#define MT6660_REG_TDM_CFG3 (0x15)
|
||||
#define MT6660_REG_HPF_CTRL (0x18)
|
||||
#define MT6660_REG_HPF1_COEF (0x1A)
|
||||
#define MT6660_REG_HPF2_COEF (0x1B)
|
||||
#define MT6660_REG_PATH_BYPASS (0x1E)
|
||||
#define MT6660_REG_WDT_CTRL (0x20)
|
||||
#define MT6660_REG_HCLIP_CTRL (0x24)
|
||||
#define MT6660_REG_VOL_CTRL (0x29)
|
||||
#define MT6660_REG_SPS_CTRL (0x30)
|
||||
#define MT6660_REG_SIGMAX (0x33)
|
||||
#define MT6660_REG_CALI_T0 (0x3F)
|
||||
#define MT6660_REG_BST_CTRL (0x40)
|
||||
#define MT6660_REG_PROTECTION_CFG (0x46)
|
||||
#define MT6660_REG_DA_GAIN (0x4c)
|
||||
#define MT6660_REG_AUDIO_IN2_SEL (0x50)
|
||||
#define MT6660_REG_SIG_GAIN (0x51)
|
||||
#define MT6660_REG_PLL_CFG1 (0x60)
|
||||
#define MT6660_REG_DRE_CTRL (0x68)
|
||||
#define MT6660_REG_DRE_THDMODE (0x69)
|
||||
#define MT6660_REG_DRE_CORASE (0x6B)
|
||||
#define MT6660_REG_PWM_CTRL (0x70)
|
||||
#define MT6660_REG_DC_PROTECT_CTRL (0x74)
|
||||
#define MT6660_REG_ADC_USB_MODE (0x7c)
|
||||
#define MT6660_REG_INTERNAL_CFG (0x88)
|
||||
#define MT6660_REG_RESV0 (0x98)
|
||||
#define MT6660_REG_RESV1 (0x99)
|
||||
#define MT6660_REG_RESV2 (0x9A)
|
||||
#define MT6660_REG_RESV3 (0x9B)
|
||||
#define MT6660_REG_RESV6 (0xA2)
|
||||
#define MT6660_REG_RESV7 (0xA3)
|
||||
#define MT6660_REG_RESV10 (0xB0)
|
||||
#define MT6660_REG_RESV11 (0xB1)
|
||||
#define MT6660_REG_RESV16 (0xB6)
|
||||
#define MT6660_REG_RESV17 (0xB7)
|
||||
#define MT6660_REG_RESV19 (0xB9)
|
||||
#define MT6660_REG_RESV21 (0xBB)
|
||||
#define MT6660_REG_RESV23 (0xBD)
|
||||
#define MT6660_REG_RESV31 (0xD3)
|
||||
#define MT6660_REG_RESV40 (0xE0)
|
||||
|
||||
#endif /* __SND_SOC_MT6660_H */
|
||||
Loading…
Reference in New Issue