arm: vf610: zii devel b: Add support for switch interrupts
The Switches use GPIO lines to indicate interrupts from two of the switches. With these interrupts in place, we can make use of the interrupt controllers within the switch to indicate when the internal PHYs generate an interrupt. Use standard PHY properties to do this. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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ae0219cb44
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@ -88,10 +88,16 @@
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switch0: switch0@0 {
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compatible = "marvell,mv88e6085";
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pinctrl-0 = <&pinctrl_gpio_switch0>;
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pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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dsa,member = <0 0>;
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interrupt-parent = <&gpio0>;
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interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ports {
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#address-cells = <1>;
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@ -99,16 +105,19 @@
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port@0 {
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reg = <0>;
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label = "lan0";
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phy-handle = <&switch0phy0>;
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};
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port@1 {
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reg = <1>;
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label = "lan1";
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phy-handle = <&switch0phy1>;
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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phy-handle = <&switch0phy2>;
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};
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switch0port5: port@5 {
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@ -133,6 +142,24 @@
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};
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};
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};
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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switch0phy0: switch0phy0@0 {
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reg = <0>;
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interrupt-parent = <&switch0>;
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interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
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};
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switch0phy1: switch1phy0@1 {
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reg = <1>;
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interrupt-parent = <&switch0>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH>; };
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switch0phy2: switch1phy0@2 {
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reg = <2>;
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interrupt-parent = <&switch0>;
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interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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};
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};
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@ -143,10 +170,16 @@
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switch1: switch1@0 {
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compatible = "marvell,mv88e6085";
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pinctrl-0 = <&pinctrl_gpio_switch1>;
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pinctrl-names = "default";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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dsa,member = <0 1>;
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interrupt-parent = <&gpio0>;
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interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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#interrupt-cells = <2>;
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ports {
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#address-cells = <1>;
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@ -196,12 +229,18 @@
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#size-cells = <0>;
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switch1phy0: switch1phy0@0 {
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reg = <0>;
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interrupt-parent = <&switch1>;
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interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
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};
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switch1phy1: switch1phy0@1 {
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reg = <1>;
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interrupt-parent = <&switch1>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
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};
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switch1phy2: switch1phy0@2 {
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reg = <2>;
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interrupt-parent = <&switch1>;
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interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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};
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@ -636,6 +675,18 @@
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>;
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};
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pinctrl_gpio_switch0: pinctrl-gpio-switch0 {
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fsl,pins = <
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VF610_PAD_PTB5__GPIO_27 0x219d
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>;
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};
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pinctrl_gpio_switch1: pinctrl-gpio-switch1 {
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fsl,pins = <
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VF610_PAD_PTB4__GPIO_26 0x219d
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>;
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};
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pinctrl_i2c_mux_reset: pinctrl-i2c-mux-reset {
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fsl,pins = <
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VF610_PAD_PTE14__GPIO_119 0x31c2
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