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ARM: imx: use __iomem pointers for MMIO 

ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.

This found a bug in mach-armadillo5x0.c, where we attempt mmio
on the MXC_CCM_RCSR address that is currently defined to 0xc
and consequently causes an illegal address access.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Arnd Bergmann 2012-09-14 20:14:01 +00:00
parent a21e5e282b
commit f25d696aed
4 changed files with 7 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/mach-imx/mach-kzm_arm11_01.c
View File

@ -259,13 +259,13 @@ static void __init kzm_board_init(void)
*/
static struct map_desc kzm_io_desc[] __initdata = {
{
.virtual = MX31_CS4_BASE_ADDR_VIRT,
.virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
.length = MX31_CS4_SIZE,
.type = MT_DEVICE
},
{
.virtual = MX31_CS5_BASE_ADDR_VIRT,
.virtual = (unsigned long)MX31_CS5_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
.length = MX31_CS5_SIZE,
.type = MT_DEVICE

2
arch/arm/mach-imx/mach-mx31ads.c
View File

@ -540,7 +540,7 @@ static void __init mxc_init_audio(void)
*/
static struct map_desc mx31ads_io_desc[] __initdata = {
{
.virtual = MX31_CS4_BASE_ADDR_VIRT,
.virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
.length = CS4_CS8900_MMIO_START,
.type = MT_DEVICE

2
arch/arm/mach-imx/mach-mx31lite.c
View File

@ -207,7 +207,7 @@ static struct platform_device physmap_flash_device = {
*/
static struct map_desc mx31lite_io_desc[] __initdata = {
{
.virtual = MX31_CS4_BASE_ADDR_VIRT,
.virtual = (unsigned long)MX31_CS4_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
.length = MX31_CS4_SIZE,
.type = MT_DEVICE

6
arch/arm/plat-mxc/include/mach/mx31.h
View File

@ -76,7 +76,7 @@
#define MX31_RTIC_BASE_ADDR (MX31_AIPS2_BASE_ADDR + 0xec000)
#define MX31_ROMP_BASE_ADDR 0x60000000
#define MX31_ROMP_BASE_ADDR_VIRT 0xfc500000
#define MX31_ROMP_BASE_ADDR_VIRT IOMEM(0xfc500000)
#define MX31_ROMP_SIZE SZ_1M
#define MX31_AVIC_BASE_ADDR 0x68000000
@ -92,11 +92,11 @@
#define MX31_CS3_BASE_ADDR 0xb2000000
#define MX31_CS4_BASE_ADDR 0xb4000000
#define MX31_CS4_BASE_ADDR_VIRT 0xf6000000
#define MX31_CS4_BASE_ADDR_VIRT IOMEM(0xf6000000)
#define MX31_CS4_SIZE SZ_32M
#define MX31_CS5_BASE_ADDR 0xb6000000
#define MX31_CS5_BASE_ADDR_VIRT 0xf8000000
#define MX31_CS5_BASE_ADDR_VIRT IOMEM(0xf8000000)
#define MX31_CS5_SIZE SZ_32M
#define MX31_X_MEMC_BASE_ADDR 0xb8000000