arm64: dts: imx8mm: Enable CPLD_Dn pull down resistor on MX8Menlo
Enable CPLD_Dn pull down resistor instead of pull up to avoid
intefering with CPLD power off functionality.
Fixes: 510c527b4f
("arm64: dts: imx8mm: Add i.MX8M Mini Toradex Verdin based Menlo board")
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -250,21 +250,21 @@
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/* SODIMM 96 */
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MX8MM_IOMUXC_SAI1_RXD2_GPIO4_IO4 0x1c4
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/* CPLD_D[7] */
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MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x1c4
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MX8MM_IOMUXC_SAI1_RXD3_GPIO4_IO5 0x184
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/* CPLD_D[6] */
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MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x1c4
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MX8MM_IOMUXC_SAI1_RXFS_GPIO4_IO0 0x184
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/* CPLD_D[5] */
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MX8MM_IOMUXC_SAI1_TXC_GPIO4_IO11 0x1c4
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MX8MM_IOMUXC_SAI1_TXC_GPIO4_IO11 0x184
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/* CPLD_D[4] */
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MX8MM_IOMUXC_SAI1_TXD0_GPIO4_IO12 0x1c4
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MX8MM_IOMUXC_SAI1_TXD0_GPIO4_IO12 0x184
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/* CPLD_D[3] */
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MX8MM_IOMUXC_SAI1_TXD1_GPIO4_IO13 0x1c4
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MX8MM_IOMUXC_SAI1_TXD1_GPIO4_IO13 0x184
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/* CPLD_D[2] */
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MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14 0x1c4
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MX8MM_IOMUXC_SAI1_TXD2_GPIO4_IO14 0x184
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/* CPLD_D[1] */
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MX8MM_IOMUXC_SAI1_TXD3_GPIO4_IO15 0x1c4
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MX8MM_IOMUXC_SAI1_TXD3_GPIO4_IO15 0x184
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/* CPLD_D[0] */
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MX8MM_IOMUXC_SAI1_TXD4_GPIO4_IO16 0x1c4
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MX8MM_IOMUXC_SAI1_TXD4_GPIO4_IO16 0x184
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/* KBD_intK */
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MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x1c4
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/* DISP_reset */
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