drm/i915: Use VMA directly for checking tiling parameters
v2: Rename functions to suit their more active role Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1471254551-25805-14-git-send-email-chris@chris-wilson.co.uk
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@ -116,35 +116,46 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
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return true;
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return true;
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}
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}
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/* Is the current GTT allocation valid for the change in tiling? */
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/* Make the current GTT allocation valid for the change in tiling. */
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static bool
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static int
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i915_gem_object_fence_ok(struct drm_i915_gem_object *obj, int tiling_mode)
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i915_gem_object_fence_prepare(struct drm_i915_gem_object *obj, int tiling_mode)
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{
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{
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struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
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struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
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struct i915_vma *vma;
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u32 size;
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u32 size;
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if (tiling_mode == I915_TILING_NONE)
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if (tiling_mode == I915_TILING_NONE)
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return true;
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return 0;
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if (INTEL_GEN(dev_priv) >= 4)
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if (INTEL_GEN(dev_priv) >= 4)
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return true;
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return 0;
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vma = i915_gem_obj_to_ggtt(obj);
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if (!vma)
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return 0;
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if (!obj->map_and_fenceable)
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return 0;
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if (IS_GEN3(dev_priv)) {
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if (IS_GEN3(dev_priv)) {
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if (i915_gem_obj_ggtt_offset(obj) & ~I915_FENCE_START_MASK)
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if (vma->node.start & ~I915_FENCE_START_MASK)
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return false;
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goto bad;
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} else {
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} else {
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if (i915_gem_obj_ggtt_offset(obj) & ~I830_FENCE_START_MASK)
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if (vma->node.start & ~I830_FENCE_START_MASK)
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return false;
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goto bad;
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}
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}
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size = i915_gem_get_ggtt_size(dev_priv, obj->base.size, tiling_mode);
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size = i915_gem_get_ggtt_size(dev_priv, obj->base.size, tiling_mode);
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if (i915_gem_obj_ggtt_size(obj) != size)
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if (vma->node.size < size)
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return false;
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goto bad;
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if (i915_gem_obj_ggtt_offset(obj) & (size - 1))
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if (vma->node.start & (size - 1))
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return false;
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goto bad;
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return true;
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return 0;
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bad:
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return i915_vma_unbind(vma);
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}
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}
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/**
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/**
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@ -168,7 +179,7 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
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struct drm_i915_gem_set_tiling *args = data;
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struct drm_i915_gem_set_tiling *args = data;
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct drm_i915_private *dev_priv = to_i915(dev);
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struct drm_i915_gem_object *obj;
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struct drm_i915_gem_object *obj;
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int ret = 0;
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int err = 0;
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/* Make sure we don't cross-contaminate obj->tiling_and_stride */
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/* Make sure we don't cross-contaminate obj->tiling_and_stride */
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BUILD_BUG_ON(I915_TILING_LAST & STRIDE_MASK);
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BUILD_BUG_ON(I915_TILING_LAST & STRIDE_MASK);
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@ -187,7 +198,7 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
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mutex_lock(&dev->struct_mutex);
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mutex_lock(&dev->struct_mutex);
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if (obj->pin_display || obj->framebuffer_references) {
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if (obj->pin_display || obj->framebuffer_references) {
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ret = -EBUSY;
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err = -EBUSY;
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goto err;
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goto err;
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}
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}
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@ -234,11 +245,9 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
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* has to also include the unfenced register the GPU uses
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* has to also include the unfenced register the GPU uses
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* whilst executing a fenced command for an untiled object.
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* whilst executing a fenced command for an untiled object.
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*/
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*/
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if (obj->map_and_fenceable &&
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!i915_gem_object_fence_ok(obj, args->tiling_mode))
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ret = i915_vma_unbind(i915_gem_obj_to_ggtt(obj));
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if (ret == 0) {
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err = i915_gem_object_fence_prepare(obj, args->tiling_mode);
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if (!err) {
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if (obj->pages &&
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if (obj->pages &&
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obj->madv == I915_MADV_WILLNEED &&
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obj->madv == I915_MADV_WILLNEED &&
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dev_priv->quirks & QUIRK_PIN_SWIZZLED_PAGES) {
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dev_priv->quirks & QUIRK_PIN_SWIZZLED_PAGES) {
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@ -281,7 +290,7 @@ err:
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intel_runtime_pm_put(dev_priv);
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intel_runtime_pm_put(dev_priv);
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return ret;
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return err;
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}
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}
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/**
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/**
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