gpio: Retire the explicit gpio irqchip code
Now that all gpiolib irqchip users have been over to use the irqchip template, we can finally retire the old code path and leave just one way in to the irqchip: set up the template when registering the gpio_chip. For a while we had two code paths for this which was a bit confusing. This brings this work to a conclusion, there is now one way of doing this. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Cc: Thierry Reding <thierry.reding@gmail.com> Link: https://lore.kernel.org/r/20201019134046.65101-1-linus.walleij@linaro.org
This commit is contained in:
Linus Walleij
parent
163d1719d3
commit
f1f37abbe6
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@ -416,7 +416,8 @@ The preferred way to set up the helpers is to fill in the
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struct gpio_irq_chip inside struct gpio_chip before adding the gpio_chip.
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If you do this, the additional irq_chip will be set up by gpiolib at the
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same time as setting up the rest of the GPIO functionality. The following
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is a typical example of a cascaded interrupt handler using gpio_irq_chip:
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is a typical example of a chained cascaded interrupt handler using
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the gpio_irq_chip:
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.. code-block:: c
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@ -452,7 +453,46 @@ is a typical example of a cascaded interrupt handler using gpio_irq_chip:
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return devm_gpiochip_add_data(dev, &g->gc, g);
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The helper support using hierarchical interrupt controllers as well.
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The helper supports using threaded interrupts as well. Then you just request
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the interrupt separately and go with it:
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.. code-block:: c
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/* Typical state container with dynamic irqchip */
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struct my_gpio {
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struct gpio_chip gc;
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struct irq_chip irq;
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};
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int irq; /* from platform etc */
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struct my_gpio *g;
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struct gpio_irq_chip *girq;
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/* Set up the irqchip dynamically */
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g->irq.name = "my_gpio_irq";
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g->irq.irq_ack = my_gpio_ack_irq;
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g->irq.irq_mask = my_gpio_mask_irq;
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g->irq.irq_unmask = my_gpio_unmask_irq;
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g->irq.irq_set_type = my_gpio_set_irq_type;
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ret = devm_request_threaded_irq(dev, irq, NULL,
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irq_thread_fn, IRQF_ONESHOT, "my-chip", g);
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if (ret < 0)
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return ret;
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/* Get a pointer to the gpio_irq_chip */
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girq = &g->gc.irq;
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girq->chip = &g->irq;
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/* This will let us handle the parent IRQ in the driver */
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girq->parent_handler = NULL;
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girq->num_parents = 0;
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girq->parents = NULL;
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girq->default_type = IRQ_TYPE_NONE;
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girq->handler = handle_bad_irq;
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return devm_gpiochip_add_data(dev, &g->gc, g);
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The helper supports using hierarchical interrupt controllers as well.
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In this case the typical set-up will look like this:
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.. code-block:: c
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@ -493,25 +533,6 @@ the parent hardware irq from a child (i.e. this gpio chip) hardware irq.
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As always it is good to look at examples in the kernel tree for advice
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on how to find the required pieces.
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The old way of adding irqchips to gpiochips after registration is also still
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available but we try to move away from this:
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- DEPRECATED: gpiochip_irqchip_add(): adds a chained cascaded irqchip to a
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gpiochip. It will pass the struct gpio_chip* for the chip to all IRQ
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callbacks, so the callbacks need to embed the gpio_chip in its state
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container and obtain a pointer to the container using container_of().
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(See Documentation/driver-api/driver-model/design-patterns.rst)
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- gpiochip_irqchip_add_nested(): adds a nested cascaded irqchip to a gpiochip,
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as discussed above regarding different types of cascaded irqchips. The
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cascaded irq has to be handled by a threaded interrupt handler.
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Apart from that it works exactly like the chained irqchip.
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- gpiochip_set_nested_irqchip(): sets up a nested cascaded irq handler for a
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gpio_chip from a parent IRQ. As the parent IRQ has usually been
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explicitly requested by the driver, this does very little more than
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mark all the child IRQs as having the other IRQ as parent.
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If there is a need to exclude certain GPIO lines from the IRQ domain handled by
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these helpers, we can set .irq.need_valid_mask of the gpiochip before
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devm_gpiochip_add_data() or gpiochip_add_data() is called. This allocates an
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@ -129,58 +129,9 @@ GPIOLIB irqchip
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The GPIOLIB irqchip is a helper irqchip for "simple cases" that should
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try to cover any generic kind of irqchip cascaded from a GPIO.
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- Convert all the GPIOLIB_IRQCHIP users to pass an irqchip template,
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parent and flags before calling [devm_]gpiochip_add[_data]().
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Currently we set up the irqchip after setting up the gpiochip
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using gpiochip_irqchip_add() and gpiochip_set_[chained|nested]_irqchip().
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This is too complex, so convert all users over to just set up
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the irqchip before registering the gpio_chip, typical example:
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/* Typical state container with dynamic irqchip */
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struct my_gpio {
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struct gpio_chip gc;
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struct irq_chip irq;
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};
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int irq; /* from platform etc */
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struct my_gpio *g;
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struct gpio_irq_chip *girq;
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/* Set up the irqchip dynamically */
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g->irq.name = "my_gpio_irq";
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g->irq.irq_ack = my_gpio_ack_irq;
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g->irq.irq_mask = my_gpio_mask_irq;
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g->irq.irq_unmask = my_gpio_unmask_irq;
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g->irq.irq_set_type = my_gpio_set_irq_type;
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/* Get a pointer to the gpio_irq_chip */
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girq = &g->gc.irq;
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girq->chip = &g->irq;
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girq->parent_handler = ftgpio_gpio_irq_handler;
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girq->num_parents = 1;
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girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents),
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GFP_KERNEL);
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if (!girq->parents)
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return -ENOMEM;
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girq->default_type = IRQ_TYPE_NONE;
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girq->handler = handle_bad_irq;
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girq->parents[0] = irq;
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When this is done, we will delete the old APIs for instatiating
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GPIOLIB_IRQCHIP and simplify the code.
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- Look over and identify any remaining easily converted drivers and
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dry-code conversions to gpiolib irqchip for maintainers to test
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- Drop gpiochip_set_chained_irqchip() when all the chained irqchips
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have been converted to the above infrastructure.
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- Add more infrastructure to make it possible to also pass a threaded
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irqchip in struct gpio_irq_chip.
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- Drop gpiochip_irqchip_add_nested() when all the chained irqchips
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have been converted to the above infrastructure.
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Increase integration with pin control
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@ -924,67 +924,6 @@ bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
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}
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EXPORT_SYMBOL_GPL(gpiochip_irqchip_irq_valid);
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/**
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* gpiochip_set_cascaded_irqchip() - connects a cascaded irqchip to a gpiochip
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* @gc: the gpiochip to set the irqchip chain to
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* @parent_irq: the irq number corresponding to the parent IRQ for this
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* cascaded irqchip
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* @parent_handler: the parent interrupt handler for the accumulated IRQ
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* coming out of the gpiochip. If the interrupt is nested rather than
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* cascaded, pass NULL in this handler argument
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*/
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static void gpiochip_set_cascaded_irqchip(struct gpio_chip *gc,
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unsigned int parent_irq,
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irq_flow_handler_t parent_handler)
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{
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struct gpio_irq_chip *girq = &gc->irq;
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struct device *dev = &gc->gpiodev->dev;
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if (!girq->domain) {
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chip_err(gc, "called %s before setting up irqchip\n",
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__func__);
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return;
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}
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if (parent_handler) {
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if (gc->can_sleep) {
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chip_err(gc,
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"you cannot have chained interrupts on a chip that may sleep\n");
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return;
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}
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girq->parents = devm_kcalloc(dev, 1,
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sizeof(*girq->parents),
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GFP_KERNEL);
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if (!girq->parents) {
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chip_err(gc, "out of memory allocating parent IRQ\n");
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return;
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}
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girq->parents[0] = parent_irq;
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girq->num_parents = 1;
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/*
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* The parent irqchip is already using the chip_data for this
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* irqchip, so our callbacks simply use the handler_data.
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*/
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irq_set_chained_handler_and_data(parent_irq, parent_handler,
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gc);
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}
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}
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/**
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* gpiochip_set_nested_irqchip() - connects a nested irqchip to a gpiochip
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* @gc: the gpiochip to set the irqchip nested handler to
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* @irqchip: the irqchip to nest to the gpiochip
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* @parent_irq: the irq number corresponding to the parent IRQ for this
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* nested irqchip
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*/
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void gpiochip_set_nested_irqchip(struct gpio_chip *gc,
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struct irq_chip *irqchip,
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unsigned int parent_irq)
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{
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gpiochip_set_cascaded_irqchip(gc, parent_irq, NULL);
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}
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EXPORT_SYMBOL_GPL(gpiochip_set_nested_irqchip);
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#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
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/**
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@ -1635,98 +1574,6 @@ static void gpiochip_irqchip_remove(struct gpio_chip *gc)
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gpiochip_irqchip_free_valid_mask(gc);
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}
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/**
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* gpiochip_irqchip_add_key() - adds an irqchip to a gpiochip
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* @gc: the gpiochip to add the irqchip to
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* @irqchip: the irqchip to add to the gpiochip
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* @first_irq: if not dynamically assigned, the base (first) IRQ to
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* allocate gpiochip irqs from
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* @handler: the irq handler to use (often a predefined irq core function)
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* @type: the default type for IRQs on this irqchip, pass IRQ_TYPE_NONE
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* to have the core avoid setting up any default type in the hardware.
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* @threaded: whether this irqchip uses a nested thread handler
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* @lock_key: lockdep class for IRQ lock
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* @request_key: lockdep class for IRQ request
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*
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* This function closely associates a certain irqchip with a certain
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* gpiochip, providing an irq domain to translate the local IRQs to
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* global irqs in the gpiolib core, and making sure that the gpiochip
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* is passed as chip data to all related functions. Driver callbacks
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* need to use gpiochip_get_data() to get their local state containers back
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* from the gpiochip passed as chip data. An irqdomain will be stored
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* in the gpiochip that shall be used by the driver to handle IRQ number
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* translation. The gpiochip will need to be initialized and registered
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* before calling this function.
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*
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* This function will handle two cell:ed simple IRQs and assumes all
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* the pins on the gpiochip can generate a unique IRQ. Everything else
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* need to be open coded.
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*/
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int gpiochip_irqchip_add_key(struct gpio_chip *gc,
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struct irq_chip *irqchip,
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unsigned int first_irq,
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irq_flow_handler_t handler,
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unsigned int type,
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bool threaded,
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struct lock_class_key *lock_key,
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struct lock_class_key *request_key)
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{
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struct device_node *of_node;
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if (!gc || !irqchip)
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return -EINVAL;
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if (!gc->parent) {
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chip_err(gc, "missing gpiochip .dev parent pointer\n");
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return -EINVAL;
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}
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gc->irq.threaded = threaded;
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of_node = gc->parent->of_node;
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#ifdef CONFIG_OF_GPIO
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/*
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* If the gpiochip has an assigned OF node this takes precedence
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* FIXME: get rid of this and use gc->parent->of_node
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* everywhere
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*/
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if (gc->of_node)
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of_node = gc->of_node;
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#endif
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/*
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* Specifying a default trigger is a terrible idea if DT or ACPI is
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* used to configure the interrupts, as you may end-up with
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* conflicting triggers. Tell the user, and reset to NONE.
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*/
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if (WARN(of_node && type != IRQ_TYPE_NONE,
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"%pOF: Ignoring %d default trigger\n", of_node, type))
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type = IRQ_TYPE_NONE;
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if (has_acpi_companion(gc->parent) && type != IRQ_TYPE_NONE) {
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acpi_handle_warn(ACPI_HANDLE(gc->parent),
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"Ignoring %d default trigger\n", type);
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type = IRQ_TYPE_NONE;
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}
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gc->irq.chip = irqchip;
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gc->irq.handler = handler;
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gc->irq.default_type = type;
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gc->to_irq = gpiochip_to_irq;
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gc->irq.lock_key = lock_key;
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gc->irq.request_key = request_key;
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gc->irq.domain = irq_domain_add_simple(of_node,
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gc->ngpio, first_irq,
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&gpiochip_domain_ops, gc);
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if (!gc->irq.domain) {
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gc->irq.chip = NULL;
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return -EINVAL;
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}
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gpiochip_set_irq_hooks(gc);
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acpi_gpiochip_request_interrupts(gc);
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return 0;
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}
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EXPORT_SYMBOL_GPL(gpiochip_irqchip_add_key);
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/**
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* gpiochip_irqchip_add_domain() - adds an irqdomain to a gpiochip
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* @gc: the gpiochip to add the irqchip to
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@ -621,83 +621,12 @@ int gpiochip_irq_domain_activate(struct irq_domain *domain,
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void gpiochip_irq_domain_deactivate(struct irq_domain *domain,
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struct irq_data *data);
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void gpiochip_set_nested_irqchip(struct gpio_chip *gc,
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struct irq_chip *irqchip,
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unsigned int parent_irq);
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int gpiochip_irqchip_add_key(struct gpio_chip *gc,
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struct irq_chip *irqchip,
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unsigned int first_irq,
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irq_flow_handler_t handler,
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unsigned int type,
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bool threaded,
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struct lock_class_key *lock_key,
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struct lock_class_key *request_key);
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bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gc,
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unsigned int offset);
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int gpiochip_irqchip_add_domain(struct gpio_chip *gc,
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struct irq_domain *domain);
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#ifdef CONFIG_LOCKDEP
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/*
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* Lockdep requires that each irqchip instance be created with a
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* unique key so as to avoid unnecessary warnings. This upfront
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* boilerplate static inlines provides such a key for each
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* unique instance.
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*/
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static inline int gpiochip_irqchip_add(struct gpio_chip *gc,
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struct irq_chip *irqchip,
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unsigned int first_irq,
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irq_flow_handler_t handler,
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unsigned int type)
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{
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static struct lock_class_key lock_key;
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static struct lock_class_key request_key;
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return gpiochip_irqchip_add_key(gc, irqchip, first_irq,
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handler, type, false,
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&lock_key, &request_key);
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}
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static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gc,
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struct irq_chip *irqchip,
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unsigned int first_irq,
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irq_flow_handler_t handler,
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unsigned int type)
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{
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static struct lock_class_key lock_key;
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static struct lock_class_key request_key;
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return gpiochip_irqchip_add_key(gc, irqchip, first_irq,
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handler, type, true,
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&lock_key, &request_key);
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}
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#else /* ! CONFIG_LOCKDEP */
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static inline int gpiochip_irqchip_add(struct gpio_chip *gc,
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struct irq_chip *irqchip,
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unsigned int first_irq,
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irq_flow_handler_t handler,
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unsigned int type)
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{
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return gpiochip_irqchip_add_key(gc, irqchip, first_irq,
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handler, type, false, NULL, NULL);
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}
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static inline int gpiochip_irqchip_add_nested(struct gpio_chip *gc,
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struct irq_chip *irqchip,
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unsigned int first_irq,
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irq_flow_handler_t handler,
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unsigned int type)
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{
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return gpiochip_irqchip_add_key(gc, irqchip, first_irq,
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handler, type, true, NULL, NULL);
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}
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#endif /* CONFIG_LOCKDEP */
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int gpiochip_generic_request(struct gpio_chip *gc, unsigned int offset);
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void gpiochip_generic_free(struct gpio_chip *gc, unsigned int offset);
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int gpiochip_generic_config(struct gpio_chip *gc, unsigned int offset,
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