vfio/mlx5: Expose migration commands over mlx5 device
Expose migration commands over the device, it includes: suspend, resume, get vhca id, query/save/load state. As part of this adds the APIs and data structure that are needed to manage the migration data. Link: https://lore.kernel.org/all/20220224142024.147653-13-yishaih@nvidia.com Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Yishai Hadas <yishaih@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Leon Romanovsky <leonro@nvidia.com>
This commit is contained in:
Yishai Hadas
Leon Romanovsky
parent
0f3f9cd7f7
commit
f1d98f346e
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@ -0,0 +1,259 @@
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// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
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/*
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* Copyright (c) 2021-2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved
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*/
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#include "cmd.h"
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int mlx5vf_cmd_suspend_vhca(struct pci_dev *pdev, u16 vhca_id, u16 op_mod)
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{
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struct mlx5_core_dev *mdev = mlx5_vf_get_core_dev(pdev);
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u32 out[MLX5_ST_SZ_DW(suspend_vhca_out)] = {};
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u32 in[MLX5_ST_SZ_DW(suspend_vhca_in)] = {};
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int ret;
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if (!mdev)
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return -ENOTCONN;
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MLX5_SET(suspend_vhca_in, in, opcode, MLX5_CMD_OP_SUSPEND_VHCA);
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MLX5_SET(suspend_vhca_in, in, vhca_id, vhca_id);
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MLX5_SET(suspend_vhca_in, in, op_mod, op_mod);
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ret = mlx5_cmd_exec_inout(mdev, suspend_vhca, in, out);
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mlx5_vf_put_core_dev(mdev);
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return ret;
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}
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int mlx5vf_cmd_resume_vhca(struct pci_dev *pdev, u16 vhca_id, u16 op_mod)
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{
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struct mlx5_core_dev *mdev = mlx5_vf_get_core_dev(pdev);
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u32 out[MLX5_ST_SZ_DW(resume_vhca_out)] = {};
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u32 in[MLX5_ST_SZ_DW(resume_vhca_in)] = {};
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int ret;
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if (!mdev)
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return -ENOTCONN;
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MLX5_SET(resume_vhca_in, in, opcode, MLX5_CMD_OP_RESUME_VHCA);
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MLX5_SET(resume_vhca_in, in, vhca_id, vhca_id);
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MLX5_SET(resume_vhca_in, in, op_mod, op_mod);
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ret = mlx5_cmd_exec_inout(mdev, resume_vhca, in, out);
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mlx5_vf_put_core_dev(mdev);
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return ret;
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}
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int mlx5vf_cmd_query_vhca_migration_state(struct pci_dev *pdev, u16 vhca_id,
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size_t *state_size)
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{
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struct mlx5_core_dev *mdev = mlx5_vf_get_core_dev(pdev);
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u32 out[MLX5_ST_SZ_DW(query_vhca_migration_state_out)] = {};
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u32 in[MLX5_ST_SZ_DW(query_vhca_migration_state_in)] = {};
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int ret;
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if (!mdev)
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return -ENOTCONN;
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MLX5_SET(query_vhca_migration_state_in, in, opcode,
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MLX5_CMD_OP_QUERY_VHCA_MIGRATION_STATE);
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MLX5_SET(query_vhca_migration_state_in, in, vhca_id, vhca_id);
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MLX5_SET(query_vhca_migration_state_in, in, op_mod, 0);
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ret = mlx5_cmd_exec_inout(mdev, query_vhca_migration_state, in, out);
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if (ret)
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goto end;
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*state_size = MLX5_GET(query_vhca_migration_state_out, out,
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required_umem_size);
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end:
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mlx5_vf_put_core_dev(mdev);
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return ret;
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}
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int mlx5vf_cmd_get_vhca_id(struct pci_dev *pdev, u16 function_id, u16 *vhca_id)
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{
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struct mlx5_core_dev *mdev = mlx5_vf_get_core_dev(pdev);
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u32 in[MLX5_ST_SZ_DW(query_hca_cap_in)] = {};
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int out_size;
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void *out;
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int ret;
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if (!mdev)
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return -ENOTCONN;
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out_size = MLX5_ST_SZ_BYTES(query_hca_cap_out);
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out = kzalloc(out_size, GFP_KERNEL);
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if (!out) {
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ret = -ENOMEM;
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goto end;
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}
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MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP);
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MLX5_SET(query_hca_cap_in, in, other_function, 1);
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MLX5_SET(query_hca_cap_in, in, function_id, function_id);
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MLX5_SET(query_hca_cap_in, in, op_mod,
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MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE << 1 |
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HCA_CAP_OPMOD_GET_CUR);
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ret = mlx5_cmd_exec_inout(mdev, query_hca_cap, in, out);
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if (ret)
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goto err_exec;
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*vhca_id = MLX5_GET(query_hca_cap_out, out,
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capability.cmd_hca_cap.vhca_id);
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err_exec:
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kfree(out);
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end:
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mlx5_vf_put_core_dev(mdev);
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return ret;
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}
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static int _create_state_mkey(struct mlx5_core_dev *mdev, u32 pdn,
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struct mlx5_vf_migration_file *migf, u32 *mkey)
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{
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size_t npages = DIV_ROUND_UP(migf->total_length, PAGE_SIZE);
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struct sg_dma_page_iter dma_iter;
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int err = 0, inlen;
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__be64 *mtt;
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void *mkc;
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u32 *in;
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inlen = MLX5_ST_SZ_BYTES(create_mkey_in) +
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sizeof(*mtt) * round_up(npages, 2);
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in = kvzalloc(inlen, GFP_KERNEL);
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if (!in)
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return -ENOMEM;
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MLX5_SET(create_mkey_in, in, translations_octword_actual_size,
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DIV_ROUND_UP(npages, 2));
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mtt = (__be64 *)MLX5_ADDR_OF(create_mkey_in, in, klm_pas_mtt);
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for_each_sgtable_dma_page(&migf->table.sgt, &dma_iter, 0)
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*mtt++ = cpu_to_be64(sg_page_iter_dma_address(&dma_iter));
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mkc = MLX5_ADDR_OF(create_mkey_in, in, memory_key_mkey_entry);
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MLX5_SET(mkc, mkc, access_mode_1_0, MLX5_MKC_ACCESS_MODE_MTT);
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MLX5_SET(mkc, mkc, lr, 1);
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MLX5_SET(mkc, mkc, lw, 1);
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MLX5_SET(mkc, mkc, rr, 1);
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MLX5_SET(mkc, mkc, rw, 1);
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MLX5_SET(mkc, mkc, pd, pdn);
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MLX5_SET(mkc, mkc, bsf_octword_size, 0);
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MLX5_SET(mkc, mkc, qpn, 0xffffff);
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MLX5_SET(mkc, mkc, log_page_size, PAGE_SHIFT);
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MLX5_SET(mkc, mkc, translations_octword_size, DIV_ROUND_UP(npages, 2));
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MLX5_SET64(mkc, mkc, len, migf->total_length);
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err = mlx5_core_create_mkey(mdev, mkey, in, inlen);
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kvfree(in);
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return err;
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}
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int mlx5vf_cmd_save_vhca_state(struct pci_dev *pdev, u16 vhca_id,
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struct mlx5_vf_migration_file *migf)
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{
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struct mlx5_core_dev *mdev = mlx5_vf_get_core_dev(pdev);
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u32 out[MLX5_ST_SZ_DW(save_vhca_state_out)] = {};
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u32 in[MLX5_ST_SZ_DW(save_vhca_state_in)] = {};
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u32 pdn, mkey;
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int err;
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if (!mdev)
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return -ENOTCONN;
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err = mlx5_core_alloc_pd(mdev, &pdn);
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if (err)
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goto end;
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err = dma_map_sgtable(mdev->device, &migf->table.sgt, DMA_FROM_DEVICE,
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0);
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if (err)
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goto err_dma_map;
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err = _create_state_mkey(mdev, pdn, migf, &mkey);
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if (err)
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goto err_create_mkey;
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MLX5_SET(save_vhca_state_in, in, opcode,
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MLX5_CMD_OP_SAVE_VHCA_STATE);
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MLX5_SET(save_vhca_state_in, in, op_mod, 0);
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MLX5_SET(save_vhca_state_in, in, vhca_id, vhca_id);
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MLX5_SET(save_vhca_state_in, in, mkey, mkey);
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MLX5_SET(save_vhca_state_in, in, size, migf->total_length);
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err = mlx5_cmd_exec_inout(mdev, save_vhca_state, in, out);
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if (err)
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goto err_exec;
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migf->total_length =
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MLX5_GET(save_vhca_state_out, out, actual_image_size);
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mlx5_core_destroy_mkey(mdev, mkey);
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mlx5_core_dealloc_pd(mdev, pdn);
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dma_unmap_sgtable(mdev->device, &migf->table.sgt, DMA_FROM_DEVICE, 0);
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mlx5_vf_put_core_dev(mdev);
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return 0;
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err_exec:
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mlx5_core_destroy_mkey(mdev, mkey);
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err_create_mkey:
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dma_unmap_sgtable(mdev->device, &migf->table.sgt, DMA_FROM_DEVICE, 0);
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err_dma_map:
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mlx5_core_dealloc_pd(mdev, pdn);
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end:
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mlx5_vf_put_core_dev(mdev);
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return err;
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}
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int mlx5vf_cmd_load_vhca_state(struct pci_dev *pdev, u16 vhca_id,
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struct mlx5_vf_migration_file *migf)
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{
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struct mlx5_core_dev *mdev = mlx5_vf_get_core_dev(pdev);
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u32 out[MLX5_ST_SZ_DW(save_vhca_state_out)] = {};
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u32 in[MLX5_ST_SZ_DW(save_vhca_state_in)] = {};
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u32 pdn, mkey;
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int err;
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if (!mdev)
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return -ENOTCONN;
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mutex_lock(&migf->lock);
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if (!migf->total_length) {
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err = -EINVAL;
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goto end;
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}
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err = mlx5_core_alloc_pd(mdev, &pdn);
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if (err)
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goto end;
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err = dma_map_sgtable(mdev->device, &migf->table.sgt, DMA_TO_DEVICE, 0);
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if (err)
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goto err_reg;
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err = _create_state_mkey(mdev, pdn, migf, &mkey);
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if (err)
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goto err_mkey;
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MLX5_SET(load_vhca_state_in, in, opcode,
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MLX5_CMD_OP_LOAD_VHCA_STATE);
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MLX5_SET(load_vhca_state_in, in, op_mod, 0);
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MLX5_SET(load_vhca_state_in, in, vhca_id, vhca_id);
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MLX5_SET(load_vhca_state_in, in, mkey, mkey);
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MLX5_SET(load_vhca_state_in, in, size, migf->total_length);
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err = mlx5_cmd_exec_inout(mdev, load_vhca_state, in, out);
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mlx5_core_destroy_mkey(mdev, mkey);
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err_mkey:
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dma_unmap_sgtable(mdev->device, &migf->table.sgt, DMA_TO_DEVICE, 0);
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err_reg:
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mlx5_core_dealloc_pd(mdev, pdn);
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end:
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mlx5_vf_put_core_dev(mdev);
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mutex_unlock(&migf->lock);
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return err;
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}
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@ -0,0 +1,35 @@
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/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
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/*
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* Copyright (c) 2021-2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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*/
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#ifndef MLX5_VFIO_CMD_H
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#define MLX5_VFIO_CMD_H
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#include <linux/kernel.h>
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#include <linux/mlx5/driver.h>
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struct mlx5_vf_migration_file {
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struct file *filp;
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struct mutex lock;
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struct sg_append_table table;
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size_t total_length;
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size_t allocated_length;
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/* Optimize mlx5vf_get_migration_page() for sequential access */
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struct scatterlist *last_offset_sg;
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unsigned int sg_last_entry;
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unsigned long last_offset;
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};
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int mlx5vf_cmd_suspend_vhca(struct pci_dev *pdev, u16 vhca_id, u16 op_mod);
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int mlx5vf_cmd_resume_vhca(struct pci_dev *pdev, u16 vhca_id, u16 op_mod);
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int mlx5vf_cmd_query_vhca_migration_state(struct pci_dev *pdev, u16 vhca_id,
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size_t *state_size);
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int mlx5vf_cmd_get_vhca_id(struct pci_dev *pdev, u16 function_id, u16 *vhca_id);
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int mlx5vf_cmd_save_vhca_state(struct pci_dev *pdev, u16 vhca_id,
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struct mlx5_vf_migration_file *migf);
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int mlx5vf_cmd_load_vhca_state(struct pci_dev *pdev, u16 vhca_id,
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struct mlx5_vf_migration_file *migf);
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#endif /* MLX5_VFIO_CMD_H */
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