arm64: dts: qcom: sc7180: Add DisplayPort node
Add DP device node on sc7180. Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/1622758940-13485-1-git-send-email-khsieh@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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@ -778,6 +778,15 @@ hp_i2c: &i2c9 {
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status = "okay";
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status = "okay";
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};
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};
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&mdss_dp {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&dp_hot_plug_det>;
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data-lanes = <0 1>;
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vdda-1p2-supply = <&vdda_usb_ss_dp_1p2>;
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vdda-0p9-supply = <&vdda_usb_ss_dp_core>;
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};
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&pm6150_adc {
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&pm6150_adc {
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charger-thermistor@4f {
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charger-thermistor@4f {
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reg = <ADC5_AMUX_THM3_100K_PU>;
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reg = <ADC5_AMUX_THM3_100K_PU>;
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@ -2928,6 +2928,13 @@
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remote-endpoint = <&dsi0_in>;
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remote-endpoint = <&dsi0_in>;
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};
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};
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};
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};
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port@2 {
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reg = <2>;
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dpu_intf0_out: endpoint {
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remote-endpoint = <&dp_in>;
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};
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};
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};
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};
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mdp_opp_table: mdp-opp-table {
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mdp_opp_table: mdp-opp-table {
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@ -3044,6 +3051,75 @@
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status = "disabled";
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status = "disabled";
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};
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};
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mdss_dp: displayport-controller@ae90000 {
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compatible = "qcom,sc7180-dp";
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status = "disabled";
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reg = <0 0x0ae90000 0 0x1400>;
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interrupt-parent = <&mdss>;
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interrupts = <12>;
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clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
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<&dispcc DISP_CC_MDSS_DP_AUX_CLK>,
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<&dispcc DISP_CC_MDSS_DP_LINK_CLK>,
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<&dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
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<&dispcc DISP_CC_MDSS_DP_PIXEL_CLK>;
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clock-names = "core_iface", "core_aux", "ctrl_link",
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"ctrl_link_iface", "stream_pixel";
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#clock-cells = <1>;
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assigned-clocks = <&dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
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<&dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>;
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assigned-clock-parents = <&dp_phy 0>, <&dp_phy 1>;
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phys = <&dp_phy>;
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phy-names = "dp";
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operating-points-v2 = <&dp_opp_table>;
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power-domains = <&rpmhpd SC7180_CX>;
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#sound-dai-cells = <0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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dp_in: endpoint {
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remote-endpoint = <&dpu_intf0_out>;
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};
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};
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port@1 {
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reg = <1>;
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dp_out: endpoint { };
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};
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};
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dp_opp_table: opp-table {
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compatible = "operating-points-v2";
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opp-160000000 {
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opp-hz = /bits/ 64 <160000000>;
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required-opps = <&rpmhpd_opp_low_svs>;
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};
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opp-270000000 {
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opp-hz = /bits/ 64 <270000000>;
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required-opps = <&rpmhpd_opp_svs>;
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};
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opp-540000000 {
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opp-hz = /bits/ 64 <540000000>;
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required-opps = <&rpmhpd_opp_svs_l1>;
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};
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opp-810000000 {
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opp-hz = /bits/ 64 <810000000>;
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required-opps = <&rpmhpd_opp_nom>;
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};
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};
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};
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};
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};
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dispcc: clock-controller@af00000 {
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dispcc: clock-controller@af00000 {
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