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drm/amd/display: After program backend, also program front end regs. 

Issue:
In case of two 4K@60 + one non-4k monitor, when unplug non-4k monitor,
the remain two 4k monitor don't work properly.
Reason:
In that case, two 4k use two pipes and no split, when unplug happens,
those two monitor will use 4 pipes and split, but on that time, frontend
is not programed properly.
Solution:
After programed backend, front end should be programmed as per new pipe
setting.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Yongqiang Sun 2017-03-03 09:37:11 -05:00 committed by Alex Deucher
parent c30267f502
commit f196f0805b
1 changed files with 4 additions and 12 deletions
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16
drivers/gpu/drm/amd/display/dc/core/dc.c
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@ -806,7 +806,7 @@ bool dc_commit_streams(
enum dc_status result = DC_ERROR_UNEXPECTED; enum dc_status result = DC_ERROR_UNEXPECTED;
struct validate_context *context; struct validate_context *context;
struct dc_validation_set set[MAX_STREAMS] = { {0, {0} } }; struct dc_validation_set set[MAX_STREAMS] = { {0, {0} } };
int i, j, k; int i, j;
if (false == streams_changed(core_dc, streams, stream_count)) if (false == streams_changed(core_dc, streams, stream_count))
return DC_OK; return DC_OK;
@ -862,18 +862,10 @@ bool dc_commit_streams(
const struct core_sink *sink = context->streams[i]->sink; const struct core_sink *sink = context->streams[i]->sink;
for (j = 0; j < context->stream_status[i].surface_count; j++) { for (j = 0; j < context->stream_status[i].surface_count; j++) {
const struct dc_surface *dc_surface = struct core_surface *surface =
context->stream_status[i].surfaces[j]; DC_SURFACE_TO_CORE(context->stream_status[i].surfaces[j]);
for (k = 0; k < context->res_ctx.pool->pipe_count; k++) { core_dc->hwss.apply_ctx_for_surface(core_dc, surface, context);
struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[k];
if (dc_surface != &pipe->surface->public
|| !dc_surface->visible)
continue;
pipe->tg->funcs->set_blank(pipe->tg, false);
}
} }
CONN_MSG_MODE(sink->link, "{%dx%d, %dx%d@%dKhz}", CONN_MSG_MODE(sink->link, "{%dx%d, %dx%d@%dKhz}",