drm/i915: Disable use of hwsp_cacheline for kernel_context
Currently on execlists, we use a local hwsp for the kernel_context, rather than the engine's HWSP, as this is the default for execlists. However, seqno wrap requires allocating a new HWSP cacheline, and may require pinning a new HWSP page in the GGTT. This operation requiring pinning in the GGTT is not allowed within the kernel_context timeline, as doing so may require re-entering the kernel_context in order to evict from the GGTT. As we want to avoid requiring a new HWSP for the kernel_context, we can use the permanently pinned engine's HWSP instead. However to do so we must prevent the use of semaphores reading the kernel_context's HWSP, as the use of semaphores do not support rollover onto the same cacheline. Fortunately, the kernel_context is mostly isolated, so unlikely to give benefit to semaphores. Reported-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200210205722.794180-5-chris@chris-wilson.co.uk
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@ -2964,7 +2964,8 @@ static int gen8_emit_init_breadcrumb(struct i915_request *rq)
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{
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u32 *cs;
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GEM_BUG_ON(!i915_request_timeline(rq)->has_initial_breadcrumb);
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if (!i915_request_timeline(rq)->has_initial_breadcrumb)
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return 0;
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cs = intel_ring_begin(rq, 6);
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if (IS_ERR(cs))
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@ -4616,8 +4617,17 @@ static int __execlists_context_alloc(struct intel_context *ce,
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if (!ce->timeline) {
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struct intel_timeline *tl;
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struct i915_vma *hwsp;
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tl = intel_timeline_create(engine->gt, NULL);
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/*
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* Use the static global HWSP for the kernel context, and
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* a dynamically allocated cacheline for everyone else.
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*/
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hwsp = NULL;
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if (unlikely(intel_context_is_barrier(ce)))
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hwsp = engine->status_page.vma;
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tl = intel_timeline_create(engine->gt, hwsp);
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if (IS_ERR(tl)) {
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ret = PTR_ERR(tl);
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goto error_deref_obj;
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@ -3295,15 +3295,21 @@ static int bond_virtual_engine(struct intel_gt *gt,
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rq[0] = ERR_PTR(-ENOMEM);
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for_each_engine(master, gt, id) {
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struct i915_sw_fence fence = {};
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struct intel_context *ce;
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if (master->class == class)
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continue;
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ce = intel_context_create(master);
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if (IS_ERR(ce)) {
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err = PTR_ERR(ce);
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goto out;
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}
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memset_p((void *)rq, ERR_PTR(-EINVAL), ARRAY_SIZE(rq));
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rq[0] = igt_spinner_create_request(&spin,
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master->kernel_context,
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MI_NOOP);
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rq[0] = igt_spinner_create_request(&spin, ce, MI_NOOP);
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intel_context_put(ce);
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if (IS_ERR(rq[0])) {
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err = PTR_ERR(rq[0]);
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goto out;
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@ -886,6 +886,12 @@ emit_semaphore_wait(struct i915_request *to,
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struct i915_request *from,
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gfp_t gfp)
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{
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if (!intel_context_use_semaphores(to->context))
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goto await_fence;
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if (!rcu_access_pointer(from->hwsp_cacheline))
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goto await_fence;
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/* Just emit the first semaphore we see as request space is limited. */
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if (already_busywaiting(to) & from->engine->mask)
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goto await_fence;
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@ -931,12 +937,8 @@ i915_request_await_request(struct i915_request *to, struct i915_request *from)
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ret = i915_sw_fence_await_sw_fence_gfp(&to->submit,
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&from->submit,
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I915_FENCE_GFP);
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else if (intel_context_use_semaphores(to->context))
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ret = emit_semaphore_wait(to, from, I915_FENCE_GFP);
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else
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ret = i915_sw_fence_await_dma_fence(&to->submit,
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&from->fence, 0,
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I915_FENCE_GFP);
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ret = emit_semaphore_wait(to, from, I915_FENCE_GFP);
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if (ret < 0)
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return ret;
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@ -1035,6 +1037,8 @@ __i915_request_await_execution(struct i915_request *to,
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{
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int err;
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GEM_BUG_ON(intel_context_is_barrier(from->context));
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/* Submit both requests at the same time */
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err = __await_execution(to, from, hook, I915_FENCE_GFP);
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if (err)
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