net: sh_eth: Add support SH7734
Add define of SH7734 register and sh_eth_reset_hw_crc function. V3: Rebase net/HEAD. V2: Do not split line of #if defined. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Nobuhiro Iwamatsu
David S. Miller
parent
b744089280
commit
f0e81fecd4
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@ -7,7 +7,8 @@ config SH_ETH
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depends on SUPERH && \
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(CPU_SUBTYPE_SH7710 || CPU_SUBTYPE_SH7712 || \
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CPU_SUBTYPE_SH7763 || CPU_SUBTYPE_SH7619 || \
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CPU_SUBTYPE_SH7724 || CPU_SUBTYPE_SH7757)
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CPU_SUBTYPE_SH7724 || CPU_SUBTYPE_SH7734 || \
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CPU_SUBTYPE_SH7757)
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select CRC32
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select NET_CORE
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select MII
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@ -16,4 +17,4 @@ config SH_ETH
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---help---
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Renesas SuperH Ethernet device driver.
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This driver supporting CPUs are:
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- SH7710, SH7712, SH7763, SH7619, SH7724, and SH7757.
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- SH7619, SH7710, SH7712, SH7724, SH7734, SH7763 and SH7757.
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@ -1,8 +1,8 @@
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/*
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* SuperH Ethernet device driver
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*
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* Copyright (C) 2006-2008 Nobuhiro Iwamatsu
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* Copyright (C) 2008-2009 Renesas Solutions Corp.
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* Copyright (C) 2006-2012 Nobuhiro Iwamatsu
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* Copyright (C) 2008-2012 Renesas Solutions Corp.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -38,6 +38,7 @@
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#include <linux/slab.h>
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#include <linux/ethtool.h>
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#include <linux/if_vlan.h>
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#include <linux/clk.h>
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#include <linux/sh_eth.h>
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#include "sh_eth.h"
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@ -279,8 +280,9 @@ static struct sh_eth_cpu_data *sh_eth_get_cpu_data(struct sh_eth_private *mdp)
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return &sh_eth_my_cpu_data;
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}
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#elif defined(CONFIG_CPU_SUBTYPE_SH7763)
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#elif defined(CONFIG_CPU_SUBTYPE_SH7734) || defined(CONFIG_CPU_SUBTYPE_SH7763)
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#define SH_ETH_HAS_TSU 1
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static void sh_eth_reset_hw_crc(struct net_device *ndev);
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static void sh_eth_chip_reset(struct net_device *ndev)
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{
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struct sh_eth_private *mdp = netdev_priv(ndev);
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@ -314,6 +316,9 @@ static void sh_eth_reset(struct net_device *ndev)
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sh_eth_write(ndev, 0x0, RDFAR);
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sh_eth_write(ndev, 0x0, RDFXR);
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sh_eth_write(ndev, 0x0, RDFFR);
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/* Reset HW CRC register */
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sh_eth_reset_hw_crc(ndev);
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}
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static void sh_eth_set_duplex(struct net_device *ndev)
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@ -370,8 +375,17 @@ static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
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.no_trimd = 1,
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.no_ade = 1,
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.tsu = 1,
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#if defined(CONFIG_CPU_SUBTYPE_SH7734)
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.hw_crc = 1,
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#endif
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};
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static void sh_eth_reset_hw_crc(struct net_device *ndev)
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{
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if (sh_eth_my_cpu_data.hw_crc)
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sh_eth_write(ndev, 0x0, CSMR);
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}
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#elif defined(CONFIG_CPU_SUBTYPE_SH7619)
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#define SH_ETH_RESET_DEFAULT 1
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static struct sh_eth_cpu_data sh_eth_my_cpu_data = {
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@ -1,8 +1,8 @@
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/*
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* SuperH Ethernet device driver
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*
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* Copyright (C) 2006-2008 Nobuhiro Iwamatsu
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* Copyright (C) 2008-2011 Renesas Solutions Corp.
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* Copyright (C) 2006-2012 Nobuhiro Iwamatsu
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* Copyright (C) 2008-2012 Renesas Solutions Corp.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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@ -98,6 +98,8 @@ enum {
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CEECR,
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MAFCR,
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RTRATE,
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CSMR,
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RMII_MII,
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/* TSU Absolute address */
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ARSTR,
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@ -172,6 +174,7 @@ static const u16 sh_eth_offset_gigabit[SH_ETH_MAX_REGISTER_OFFSET] = {
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[RMCR] = 0x0458,
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[RPADIR] = 0x0460,
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[FCFTR] = 0x0468,
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[CSMR] = 0x04E4,
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[ECMR] = 0x0500,
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[ECSR] = 0x0510,
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@ -200,6 +203,7 @@ static const u16 sh_eth_offset_gigabit[SH_ETH_MAX_REGISTER_OFFSET] = {
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[CERCR] = 0x0768,
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[CEECR] = 0x0770,
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[MAFCR] = 0x0778,
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[RMII_MII] = 0x0790,
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[ARSTR] = 0x0000,
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[TSU_CTRST] = 0x0004,
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@ -377,7 +381,7 @@ static const u16 sh_eth_offset_fast_sh3_sh2[SH_ETH_MAX_REGISTER_OFFSET] = {
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/*
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* Register's bits
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*/
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#ifdef CONFIG_CPU_SUBTYPE_SH7763
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#if defined(CONFIG_CPU_SUBTYPE_SH7734) || defined(CONFIG_CPU_SUBTYPE_SH7763)
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/* EDSR */
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enum EDSR_BIT {
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EDSR_ENT = 0x01, EDSR_ENR = 0x02,
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@ -751,6 +755,7 @@ struct sh_eth_cpu_data {
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unsigned rpadir:1; /* E-DMAC have RPADIR */
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unsigned no_trimd:1; /* E-DMAC DO NOT have TRIMD */
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unsigned no_ade:1; /* E-DMAC DO NOT have ADE bit in EESR */
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unsigned hw_crc:1; /* E-DMAC have CSMR */
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};
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struct sh_eth_private {
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