LoongArch fixes for v6.0-rc4
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commit
f0c5f7ea81
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@ -39,6 +39,7 @@ config LOONGARCH
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select ARCH_INLINE_SPIN_UNLOCK_BH if !PREEMPTION
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select ARCH_INLINE_SPIN_UNLOCK_IRQ if !PREEMPTION
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select ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE if !PREEMPTION
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select ARCH_KEEP_MEMBLOCK
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select ARCH_MIGHT_HAVE_PC_PARPORT
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select ARCH_MIGHT_HAVE_PC_SERIO
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select ARCH_SPARSEMEM_ENABLE
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@ -51,6 +52,7 @@ config LOONGARCH
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select ARCH_USE_CMPXCHG_LOCKREF
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select ARCH_USE_QUEUED_RWLOCKS
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select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT
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select ARCH_WANT_LD_ORPHAN_WARN
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select ARCH_WANTS_NO_INSTR
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select BUILDTIME_TABLE_SORT
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select COMMON_CLK
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@ -15,7 +15,7 @@ extern int acpi_pci_disabled;
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extern int acpi_noirq;
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#define acpi_os_ioremap acpi_os_ioremap
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void __init __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size);
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void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size);
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static inline void disable_acpi(void)
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{
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@ -48,7 +48,7 @@ void __init __acpi_unmap_table(void __iomem *map, unsigned long size)
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early_memunmap(map, size);
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}
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void __init __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size)
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void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size)
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{
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if (!memblock_is_memory(phys))
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return ioremap(phys, size);
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@ -529,11 +529,11 @@ static void handle_signal(struct ksignal *ksig, struct pt_regs *regs)
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signal_setup_done(ret, ksig, 0);
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}
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void arch_do_signal_or_restart(struct pt_regs *regs, bool has_signal)
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void arch_do_signal_or_restart(struct pt_regs *regs)
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{
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struct ksignal ksig;
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if (has_signal && get_signal(&ksig)) {
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if (get_signal(&ksig)) {
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/* Whee! Actually deliver the signal. */
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handle_signal(&ksig, regs);
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return;
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@ -77,6 +77,8 @@ SECTIONS
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PERCPU_SECTION(1 << CONFIG_L1_CACHE_SHIFT)
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#endif
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.rela.dyn : ALIGN(8) { *(.rela.dyn) *(.rela*) }
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.init.bss : {
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*(.init.bss)
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}
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@ -18,11 +18,11 @@ void dump_tlb_regs(void)
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{
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const int field = 2 * sizeof(unsigned long);
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pr_info("Index : %0x\n", read_csr_tlbidx());
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pr_info("PageSize : %0x\n", read_csr_pagesize());
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pr_info("EntryHi : %0*llx\n", field, read_csr_entryhi());
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pr_info("EntryLo0 : %0*llx\n", field, read_csr_entrylo0());
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pr_info("EntryLo1 : %0*llx\n", field, read_csr_entrylo1());
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pr_info("Index : 0x%0x\n", read_csr_tlbidx());
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pr_info("PageSize : 0x%0x\n", read_csr_pagesize());
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pr_info("EntryHi : 0x%0*llx\n", field, read_csr_entryhi());
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pr_info("EntryLo0 : 0x%0*llx\n", field, read_csr_entrylo0());
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pr_info("EntryLo1 : 0x%0*llx\n", field, read_csr_entrylo1());
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}
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static void dump_tlb(int first, int last)
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@ -33,8 +33,8 @@ static void dump_tlb(int first, int last)
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unsigned int s_index, s_asid;
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unsigned int pagesize, c0, c1, i;
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unsigned long asidmask = cpu_asid_mask(¤t_cpu_data);
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int pwidth = 11;
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int vwidth = 11;
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int pwidth = 16;
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int vwidth = 16;
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int asidwidth = DIV_ROUND_UP(ilog2(asidmask) + 1, 4);
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s_entryhi = read_csr_entryhi();
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@ -64,22 +64,22 @@ static void dump_tlb(int first, int last)
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/*
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* Only print entries in use
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*/
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pr_info("Index: %2d pgsize=%x ", i, (1 << pagesize));
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pr_info("Index: %4d pgsize=0x%x ", i, (1 << pagesize));
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c0 = (entrylo0 & ENTRYLO_C) >> ENTRYLO_C_SHIFT;
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c1 = (entrylo1 & ENTRYLO_C) >> ENTRYLO_C_SHIFT;
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pr_cont("va=%0*lx asid=%0*lx",
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pr_cont("va=0x%0*lx asid=0x%0*lx",
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vwidth, (entryhi & ~0x1fffUL), asidwidth, asid & asidmask);
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/* NR/NX are in awkward places, so mask them off separately */
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pa = entrylo0 & ~(ENTRYLO_NR | ENTRYLO_NX);
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pa = pa & PAGE_MASK;
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pr_cont("\n\t[");
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pr_cont("ri=%d xi=%d ",
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pr_cont("nr=%d nx=%d ",
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(entrylo0 & ENTRYLO_NR) ? 1 : 0,
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(entrylo0 & ENTRYLO_NX) ? 1 : 0);
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pr_cont("pa=%0*llx c=%d d=%d v=%d g=%d plv=%lld] [",
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pr_cont("pa=0x%0*llx c=%d d=%d v=%d g=%d plv=%lld] [",
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pwidth, pa, c0,
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(entrylo0 & ENTRYLO_D) ? 1 : 0,
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(entrylo0 & ENTRYLO_V) ? 1 : 0,
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@ -88,10 +88,10 @@ static void dump_tlb(int first, int last)
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/* NR/NX are in awkward places, so mask them off separately */
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pa = entrylo1 & ~(ENTRYLO_NR | ENTRYLO_NX);
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pa = pa & PAGE_MASK;
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pr_cont("ri=%d xi=%d ",
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pr_cont("nr=%d nx=%d ",
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(entrylo1 & ENTRYLO_NR) ? 1 : 0,
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(entrylo1 & ENTRYLO_NX) ? 1 : 0);
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pr_cont("pa=%0*llx c=%d d=%d v=%d g=%d plv=%lld]\n",
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pr_cont("pa=0x%0*llx c=%d d=%d v=%d g=%d plv=%lld]\n",
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pwidth, pa, c1,
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(entrylo1 & ENTRYLO_D) ? 1 : 0,
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(entrylo1 & ENTRYLO_V) ? 1 : 0,
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@ -131,18 +131,6 @@ int arch_add_memory(int nid, u64 start, u64 size, struct mhp_params *params)
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return ret;
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}
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#ifdef CONFIG_NUMA
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int memory_add_physaddr_to_nid(u64 start)
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{
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int nid;
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nid = pa_to_nid(start);
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return nid;
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}
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EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
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#endif
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#ifdef CONFIG_MEMORY_HOTREMOVE
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void arch_remove_memory(u64 start, u64 size, struct vmem_altmap *altmap)
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{
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unsigned long start_pfn = start >> PAGE_SHIFT;
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@ -154,6 +142,13 @@ void arch_remove_memory(u64 start, u64 size, struct vmem_altmap *altmap)
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page += vmem_altmap_offset(altmap);
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__remove_pages(start_pfn, nr_pages, altmap);
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}
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#ifdef CONFIG_NUMA
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int memory_add_physaddr_to_nid(u64 start)
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{
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return pa_to_nid(start);
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}
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EXPORT_SYMBOL_GPL(memory_add_physaddr_to_nid);
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#endif
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#endif
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