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drm/i915/psr: Get pipe id following atomic guidelines 

As stated in struct drm_encoder, crtc field should only be used
by non-atomic drivers.

So here caching the pipe id in intel_psr_enable() what is way more
simple and efficient than at every call to
intel_psr_flush()/invalidate() get the
drm.mode_config.connection_mutex lock to safely be able to get the
pipe id by reading drm_connector_state.crtc.

This should fix the null pointer dereference crash below as the
previous way to get the pipe id was prone to race conditions.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105959
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181128072838.22773-1-jose.souza@intel.com
This commit is contained in:
José Roberto de Souza 2018-11-27 23:28:38 -08:00
parent b9f78d6752
commit f0ad62a631
2 changed files with 5 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/drm/i915/i915_drv.h
View File

@ -495,6 +495,7 @@ struct i915_psr {
bool sink_support;
bool prepared, enabled;
struct intel_dp *dp;
enum pipe pipe;
bool active;
struct work_struct work;
unsigned busy_frontbuffer_bits;

19
drivers/gpu/drm/i915/intel_psr.c
View File

@ -719,6 +719,7 @@ void intel_psr_enable(struct intel_dp *intel_dp,
dev_priv->psr.psr2_enabled = intel_psr2_enabled(dev_priv, crtc_state);
dev_priv->psr.busy_frontbuffer_bits = 0;
dev_priv->psr.prepared = true;
dev_priv->psr.pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
if (psr_global_enabled(dev_priv->psr.debug))
intel_psr_enable_locked(dev_priv, crtc_state);
@ -1026,9 +1027,6 @@ unlock:
void intel_psr_invalidate(struct drm_i915_private *dev_priv,
unsigned frontbuffer_bits, enum fb_op_origin origin)
{
struct drm_crtc *crtc;
enum pipe pipe;
if (!CAN_PSR(dev_priv))
return;
@ -1041,10 +1039,7 @@ void intel_psr_invalidate(struct drm_i915_private *dev_priv,
return;
}
crtc = dp_to_dig_port(dev_priv->psr.dp)->base.base.crtc;
pipe = to_intel_crtc(crtc)->pipe;
frontbuffer_bits &= INTEL_FRONTBUFFER_ALL_MASK(pipe);
frontbuffer_bits &= INTEL_FRONTBUFFER_ALL_MASK(dev_priv->psr.pipe);
dev_priv->psr.busy_frontbuffer_bits |= frontbuffer_bits;
if (frontbuffer_bits)
@ -1069,9 +1064,6 @@ void intel_psr_invalidate(struct drm_i915_private *dev_priv,
void intel_psr_flush(struct drm_i915_private *dev_priv,
unsigned frontbuffer_bits, enum fb_op_origin origin)
{
struct drm_crtc *crtc;
enum pipe pipe;
if (!CAN_PSR(dev_priv))
return;
@ -1084,10 +1076,7 @@ void intel_psr_flush(struct drm_i915_private *dev_priv,
return;
}
crtc = dp_to_dig_port(dev_priv->psr.dp)->base.base.crtc;
pipe = to_intel_crtc(crtc)->pipe;
frontbuffer_bits &= INTEL_FRONTBUFFER_ALL_MASK(pipe);
frontbuffer_bits &= INTEL_FRONTBUFFER_ALL_MASK(dev_priv->psr.pipe);
dev_priv->psr.busy_frontbuffer_bits &= ~frontbuffer_bits;
/* By definition flush = invalidate + flush */
@ -1101,7 +1090,7 @@ void intel_psr_flush(struct drm_i915_private *dev_priv,
* but it makes more sense write to the current active
* pipe.
*/
I915_WRITE(CURSURFLIVE(pipe), 0);
I915_WRITE(CURSURFLIVE(dev_priv->psr.pipe), 0);
}
if (!dev_priv->psr.active && !dev_priv->psr.busy_frontbuffer_bits)