[PATCH] dvb: frontend: tda1004x: support tda827x tuners
o added preliminary support for tda827x tuners o set parameters for drift compensation to 0 makes no sense for DVB-T but can prevent lock Signed-off-by: Hartmut Hackmann <hartmut.hackmann@t-online.de> Signed-off-by: Johannes Stezenbach <js@linuxtv.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -120,6 +120,8 @@ static int debug;
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#define TDA10046H_GPIO_OUT_SEL 0x41
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#define TDA10046H_GPIO_SELECT 0x42
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#define TDA10046H_AGC_CONF 0x43
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#define TDA10046H_AGC_THR 0x44
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#define TDA10046H_AGC_RENORM 0x45
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#define TDA10046H_AGC_GAINS 0x46
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#define TDA10046H_AGC_TUN_MIN 0x47
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#define TDA10046H_AGC_TUN_MAX 0x48
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@ -272,14 +274,26 @@ static int tda10046h_set_bandwidth(struct tda1004x_state *state,
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switch (bandwidth) {
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case BANDWIDTH_6_MHZ:
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tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_6mhz, sizeof(bandwidth_6mhz));
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if (state->config->if_freq == TDA10046_FREQ_045) {
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tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0x09);
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tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x4f);
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}
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break;
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case BANDWIDTH_7_MHZ:
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tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_7mhz, sizeof(bandwidth_7mhz));
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if (state->config->if_freq == TDA10046_FREQ_045) {
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tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0x0a);
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tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x79);
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}
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break;
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case BANDWIDTH_8_MHZ:
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tda1004x_write_buf(state, TDA10046H_TIME_WREF1, bandwidth_8mhz, sizeof(bandwidth_8mhz));
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if (state->config->if_freq == TDA10046_FREQ_045) {
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tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0x0b);
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tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0xa3);
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}
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break;
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default:
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@ -420,6 +434,14 @@ static void tda10046_init_plls(struct dvb_frontend* fe)
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tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0xd4);
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tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x13);
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break;
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case TDA10046_FREQ_045:
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tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0x0b);
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tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0xa3);
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break;
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case TDA10046_FREQ_052:
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tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_MSB, 0x0c);
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tda1004x_write_byteI(state, TDA10046H_FREQ_PHY2_LSB, 0x06);
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break;
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}
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tda10046h_set_bandwidth(state, BANDWIDTH_8_MHZ); // default bandwidth 8 MHz
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}
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@ -590,6 +612,16 @@ static int tda10046_init(struct dvb_frontend* fe)
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tda1004x_write_byteI(state, TDA10046H_AGC_CONF, 0x0a); // AGC setup
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tda1004x_write_byteI(state, TDA10046H_CONF_POLARITY, 0x60); // set AGC polarities
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break;
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case TDA10046_AGC_IFO_AUTO_POS:
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tda1004x_write_byteI(state, TDA10046H_AGC_CONF, 0x0a); // AGC setup
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tda1004x_write_byteI(state, TDA10046H_CONF_POLARITY, 0x00); // set AGC polarities
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break;
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case TDA10046_AGC_TDA827X:
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tda1004x_write_byteI(state, TDA10046H_AGC_CONF, 0x02); // AGC setup
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tda1004x_write_byteI(state, TDA10046H_AGC_THR, 0x70); // AGC Threshold
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tda1004x_write_byteI(state, TDA10046H_AGC_RENORM, 0x0E); // Gain Renormalize
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tda1004x_write_byteI(state, TDA10046H_CONF_POLARITY, 0x60); // set AGC polarities
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break;
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}
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tda1004x_write_byteI(state, TDA10046H_CONF_TRISTATE1, 0x61); // Turn both AGC outputs on
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tda1004x_write_byteI(state, TDA10046H_AGC_TUN_MIN, 0); // }
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@ -1091,9 +1123,12 @@ static int tda1004x_sleep(struct dvb_frontend* fe)
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break;
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case TDA1004X_DEMOD_TDA10046:
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tda1004x_write_mask(state, TDA1004X_CONFC4, 1, 1);
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if (state->config->pll_sleep != NULL)
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if (state->config->pll_sleep != NULL) {
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tda1004x_enable_tuner_i2c(state);
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state->config->pll_sleep(fe);
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tda1004x_disable_tuner_i2c(state);
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}
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tda1004x_write_mask(state, TDA1004X_CONFC4, 1, 1);
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break;
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}
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state->initialised = 0;
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@ -1104,8 +1139,9 @@ static int tda1004x_sleep(struct dvb_frontend* fe)
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static int tda1004x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
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{
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fesettings->min_delay_ms = 800;
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fesettings->step_size = 166667;
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fesettings->max_drift = 166667*2;
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/* Drift compensation makes no sense for DVB-T */
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fesettings->step_size = 0;
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fesettings->max_drift = 0;
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return 0;
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}
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@ -34,11 +34,15 @@ enum tda10046_xtal {
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enum tda10046_agc {
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TDA10046_AGC_DEFAULT, /* original configuration */
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TDA10046_AGC_IFO_AUTO_NEG, /* IF AGC only, automatic, negtive */
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TDA10046_AGC_IFO_AUTO_POS, /* IF AGC only, automatic, positive */
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TDA10046_AGC_TDA827X, /* IF AGC only, special setup for tda827x */
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};
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enum tda10046_if {
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TDA10046_FREQ_3617, /* original config, 36,166 MHZ */
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TDA10046_FREQ_3613, /* 36,13 MHZ */
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TDA10046_FREQ_045, /* low IF, 4.0, 4.5, or 5.0 MHZ */
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TDA10046_FREQ_052, /* low IF, 5.1667 MHZ for tda9889 */
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};
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struct tda1004x_config
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