ASoC: topology: use inclusive language for bclk and fsync
Mirror suggested changes in alsa-lib. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Link: https://lore.kernel.org/r/20201112163100.5081-2-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -72,21 +72,29 @@ struct snd_compr_stream;
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#define SND_SOC_DAIFMT_IB_IF (4 << 8) /* invert BCLK + FRM */
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/*
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* DAI hardware clock masters.
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* DAI hardware clock providers/consumers
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*
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* This is wrt the codec, the inverse is true for the interface
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* i.e. if the codec is clk and FRM master then the interface is
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* clk and frame secondary.
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* i.e. if the codec is clk and FRM provider then the interface is
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* clk and frame consumer.
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*/
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#define SND_SOC_DAIFMT_CBM_CFM (1 << 12) /* codec clk & FRM master */
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#define SND_SOC_DAIFMT_CBS_CFM (2 << 12) /* codec clk secondary & FRM master */
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#define SND_SOC_DAIFMT_CBM_CFS (3 << 12) /* codec clk master & frame secondary */
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#define SND_SOC_DAIFMT_CBS_CFS (4 << 12) /* codec clk & FRM secondary */
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#define SND_SOC_DAIFMT_CBP_CFP (1 << 12) /* codec clk provider & frame provider */
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#define SND_SOC_DAIFMT_CBC_CFP (2 << 12) /* codec clk consumer & frame provider */
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#define SND_SOC_DAIFMT_CBP_CFC (3 << 12) /* codec clk provider & frame consumer */
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#define SND_SOC_DAIFMT_CBC_CFC (4 << 12) /* codec clk consumer & frame follower */
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#define SND_SOC_DAIFMT_FORMAT_MASK 0x000f
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#define SND_SOC_DAIFMT_CLOCK_MASK 0x00f0
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#define SND_SOC_DAIFMT_INV_MASK 0x0f00
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#define SND_SOC_DAIFMT_MASTER_MASK 0xf000
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/* previous definitions kept for backwards-compatibility, do not use in new contributions */
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#define SND_SOC_DAIFMT_CBM_CFM SND_SOC_DAIFMT_CBP_CFP
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#define SND_SOC_DAIFMT_CBS_CFM SND_SOC_DAIFMT_CBC_CFP
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#define SND_SOC_DAIFMT_CBM_CFS SND_SOC_DAIFMT_CBP_CFC
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#define SND_SOC_DAIFMT_CBS_CFS SND_SOC_DAIFMT_CBC_CFC
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#define SND_SOC_DAIFMT_FORMAT_MASK 0x000f
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#define SND_SOC_DAIFMT_CLOCK_MASK 0x00f0
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#define SND_SOC_DAIFMT_INV_MASK 0x0f00
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#define SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK 0xf000
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#define SND_SOC_DAIFMT_MASTER_MASK SND_SOC_DAIFMT_CLOCK_PROVIDER_MASK
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/*
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* Master Clock Directions
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@ -170,16 +170,22 @@
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#define SND_SOC_TPLG_LNK_FLGBIT_VOICE_WAKEUP (1 << 3)
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/* DAI topology BCLK parameter
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* For the backwards capability, by default codec is bclk master
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* For the backwards capability, by default codec is bclk provider
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*/
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#define SND_SOC_TPLG_BCLK_CM 0 /* codec is bclk master */
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#define SND_SOC_TPLG_BCLK_CS 1 /* codec is bclk slave */
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#define SND_SOC_TPLG_BCLK_CP 0 /* codec is bclk provider */
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#define SND_SOC_TPLG_BCLK_CC 1 /* codec is bclk consumer */
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/* keep previous definitions for compatibility */
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#define SND_SOC_TPLG_BCLK_CM SND_SOC_TPLG_BCLK_CP
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#define SND_SOC_TPLG_BCLK_CS SND_SOC_TPLG_BCLK_CC
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/* DAI topology FSYNC parameter
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* For the backwards capability, by default codec is fsync master
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* For the backwards capability, by default codec is fsync provider
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*/
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#define SND_SOC_TPLG_FSYNC_CM 0 /* codec is fsync master */
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#define SND_SOC_TPLG_FSYNC_CS 1 /* codec is fsync slave */
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#define SND_SOC_TPLG_FSYNC_CP 0 /* codec is fsync provider */
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#define SND_SOC_TPLG_FSYNC_CC 1 /* codec is fsync consumer */
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/* keep previous definitions for compatibility */
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#define SND_SOC_TPLG_FSYNC_CM SND_SOC_TPLG_FSYNC_CP
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#define SND_SOC_TPLG_FSYNC_CS SND_SOC_TPLG_FSYNC_CC
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/*
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* Block Header.
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@ -336,8 +342,8 @@ struct snd_soc_tplg_hw_config {
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__u8 clock_gated; /* SND_SOC_TPLG_DAI_CLK_GATE_ value */
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__u8 invert_bclk; /* 1 for inverted BCLK, 0 for normal */
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__u8 invert_fsync; /* 1 for inverted frame clock, 0 for normal */
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__u8 bclk_master; /* SND_SOC_TPLG_BCLK_ value */
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__u8 fsync_master; /* SND_SOC_TPLG_FSYNC_ value */
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__u8 bclk_provider; /* SND_SOC_TPLG_BCLK_ value */
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__u8 fsync_provider; /* SND_SOC_TPLG_FSYNC_ value */
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__u8 mclk_direction; /* SND_SOC_TPLG_MCLK_ value */
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__le16 reserved; /* for 32bit alignment */
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__le32 mclk_rate; /* MCLK or SYSCLK freqency in Hz */
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@ -2017,7 +2017,7 @@ static void set_link_hw_format(struct snd_soc_dai_link *link,
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struct snd_soc_tplg_link_config *cfg)
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{
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struct snd_soc_tplg_hw_config *hw_config;
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unsigned char bclk_master, fsync_master;
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unsigned char bclk_provider, fsync_provider;
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unsigned char invert_bclk, invert_fsync;
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int i;
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@ -2057,18 +2057,18 @@ static void set_link_hw_format(struct snd_soc_dai_link *link,
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link->dai_fmt |= SND_SOC_DAIFMT_IB_IF;
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/* clock masters */
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bclk_master = (hw_config->bclk_master ==
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SND_SOC_TPLG_BCLK_CM);
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fsync_master = (hw_config->fsync_master ==
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SND_SOC_TPLG_FSYNC_CM);
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if (bclk_master && fsync_master)
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link->dai_fmt |= SND_SOC_DAIFMT_CBM_CFM;
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else if (!bclk_master && fsync_master)
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link->dai_fmt |= SND_SOC_DAIFMT_CBS_CFM;
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else if (bclk_master && !fsync_master)
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link->dai_fmt |= SND_SOC_DAIFMT_CBM_CFS;
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bclk_provider = (hw_config->bclk_provider ==
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SND_SOC_TPLG_BCLK_CP);
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fsync_provider = (hw_config->fsync_provider ==
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SND_SOC_TPLG_FSYNC_CP);
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if (bclk_provider && fsync_provider)
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link->dai_fmt |= SND_SOC_DAIFMT_CBP_CFP;
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else if (!bclk_provider && fsync_provider)
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link->dai_fmt |= SND_SOC_DAIFMT_CBC_CFP;
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else if (bclk_provider && !fsync_provider)
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link->dai_fmt |= SND_SOC_DAIFMT_CBP_CFC;
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else
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link->dai_fmt |= SND_SOC_DAIFMT_CBS_CFS;
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link->dai_fmt |= SND_SOC_DAIFMT_CBC_CFC;
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}
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}
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@ -2777,15 +2777,15 @@ static void sof_dai_set_format(struct snd_soc_tplg_hw_config *hw_config,
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struct sof_ipc_dai_config *config)
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{
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/* clock directions wrt codec */
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if (hw_config->bclk_master == SND_SOC_TPLG_BCLK_CM) {
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if (hw_config->bclk_provider == SND_SOC_TPLG_BCLK_CM) {
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/* codec is bclk master */
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if (hw_config->fsync_master == SND_SOC_TPLG_FSYNC_CM)
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if (hw_config->fsync_provider == SND_SOC_TPLG_FSYNC_CM)
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config->format |= SOF_DAI_FMT_CBM_CFM;
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else
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config->format |= SOF_DAI_FMT_CBM_CFS;
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} else {
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/* codec is bclk slave */
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if (hw_config->fsync_master == SND_SOC_TPLG_FSYNC_CM)
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if (hw_config->fsync_provider == SND_SOC_TPLG_FSYNC_CM)
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config->format |= SOF_DAI_FMT_CBS_CFM;
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else
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config->format |= SOF_DAI_FMT_CBS_CFS;
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