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ASoC: Updates for 3.5 

All driver specific and fairly small.  The pxa-ssp changes are larger
 than I'd like but they're build failures and are pretty clear to
 inspection.
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Merge tag 'asoc-3.5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus

ASoC: Updates for 3.5

All driver specific and fairly small.  The pxa-ssp changes are larger
than I'd like but they're build failures and are pretty clear to
inspection.
This commit is contained in:
Takashi Iwai 2012-06-18 08:36:00 +02:00
parent 2e8b2b29d1 3419ae781f
commit ef890ae9b3
7 changed files with 43 additions and 47 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/plat-pxa/ssp.c
View File

@ -193,6 +193,7 @@ static const struct platform_device_id ssp_id_table[] = {
{ "pxa25x-nssp", PXA25x_NSSP },
{ "pxa27x-ssp", PXA27x_SSP },
{ "pxa168-ssp", PXA168_SSP },
{ "pxa910-ssp", PXA910_SSP },
{ },
};

2
include/linux/pxa2xx_ssp.h
View File

@ -160,7 +160,9 @@ enum pxa_ssp_type {
PXA25x_SSP, /* pxa 210, 250, 255, 26x */
PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */
PXA27x_SSP,
PXA3xx_SSP,
PXA168_SSP,
PXA910_SSP,
CE4100_SSP,
};

2
include/linux/spi/pxa2xx_spi.h
View File

@ -43,7 +43,7 @@ struct pxa2xx_spi_chip {
void (*cs_control)(u32 command);
};
#ifdef CONFIG_ARCH_PXA
#if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP)
#include <linux/clk.h>
#include <mach/dma.h>

26
sound/soc/codecs/wm8904.c
View File

@ -1863,6 +1863,7 @@ static int wm8904_set_bias_level(struct snd_soc_codec *codec,
return ret;
}
regcache_cache_only(wm8904->regmap, false);
regcache_sync(wm8904->regmap);
/* Enable bias */
@ -1899,14 +1900,8 @@ static int wm8904_set_bias_level(struct snd_soc_codec *codec,
snd_soc_update_bits(codec, WM8904_BIAS_CONTROL_0,
WM8904_BIAS_ENA, 0);
#ifdef CONFIG_REGULATOR
/* Post 2.6.34 we will be able to get a callback when
* the regulators are disabled which we can use but
* for now just assume that the power will be cut if
* the regulator API is in use.
*/
codec->cache_sync = 1;
#endif
regcache_cache_only(wm8904->regmap, true);
regcache_mark_dirty(wm8904->regmap);
regulator_bulk_disable(ARRAY_SIZE(wm8904->supplies),
wm8904->supplies);
@ -2084,10 +2079,8 @@ static int wm8904_probe(struct snd_soc_codec *codec)
{
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
struct wm8904_pdata *pdata = wm8904->pdata;
u16 *reg_cache = codec->reg_cache;
int ret, i;
codec->cache_sync = 1;
codec->control_data = wm8904->regmap;
switch (wm8904->devtype) {
@ -2150,6 +2143,7 @@ static int wm8904_probe(struct snd_soc_codec *codec)
goto err_enable;
}
regcache_cache_only(wm8904->regmap, true);
/* Change some default settings - latch VU and enable ZC */
snd_soc_update_bits(codec, WM8904_ADC_DIGITAL_VOLUME_LEFT,
WM8904_ADC_VU, WM8904_ADC_VU);
@ -2180,14 +2174,18 @@ static int wm8904_probe(struct snd_soc_codec *codec)
if (!pdata->gpio_cfg[i])
continue;
reg_cache[WM8904_GPIO_CONTROL_1 + i]
= pdata->gpio_cfg[i] & 0xffff;
regmap_update_bits(wm8904->regmap,
WM8904_GPIO_CONTROL_1 + i,
0xffff,
pdata->gpio_cfg[i]);
}
/* Zero is the default value for these anyway */
for (i = 0; i < WM8904_MIC_REGS; i++)
reg_cache[WM8904_MIC_BIAS_CONTROL_0 + i]
= pdata->mic_cfg[i];
regmap_update_bits(wm8904->regmap,
WM8904_MIC_BIAS_CONTROL_0 + i,
0xffff,
pdata->mic_cfg[i]);
}
/* Set Class W by default - this will be managed by the Class

8
sound/soc/codecs/wm8996.c
View File

@ -2837,8 +2837,6 @@ static int wm8996_probe(struct snd_soc_codec *codec)
}
}
regcache_cache_only(codec->control_data, true);
/* Apply platform data settings */
snd_soc_update_bits(codec, WM8996_LINE_INPUT_CONTROL,
WM8996_INL_MODE_MASK | WM8996_INR_MODE_MASK,
@ -3051,7 +3049,6 @@ static int wm8996_remove(struct snd_soc_codec *codec)
for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++)
regulator_unregister_notifier(wm8996->supplies[i].consumer,
&wm8996->disable_nb[i]);
regulator_bulk_free(ARRAY_SIZE(wm8996->supplies), wm8996->supplies);
return 0;
}
@ -3206,14 +3203,15 @@ static __devinit int wm8996_i2c_probe(struct i2c_client *i2c,
dev_info(&i2c->dev, "revision %c\n",
(reg & WM8996_CHIP_REV_MASK) + 'A');
regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), wm8996->supplies);
ret = wm8996_reset(wm8996);
if (ret < 0) {
dev_err(&i2c->dev, "Failed to issue reset\n");
goto err_regmap;
}
regcache_cache_only(wm8996->regmap, true);
regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), wm8996->supplies);
wm8996_init_gpio(wm8996);
ret = snd_soc_register_codec(&i2c->dev,

38
sound/soc/pxa/pxa-ssp.c
View File

@ -33,7 +33,6 @@
#include <mach/hardware.h>
#include <mach/dma.h>
#include <mach/audio.h>
#include "../../arm/pxa2xx-pcm.h"
#include "pxa-ssp.h"
@ -194,7 +193,7 @@ static void pxa_ssp_set_scr(struct ssp_device *ssp, u32 div)
{
u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP) {
if (ssp->type == PXA25x_SSP) {
sscr0 &= ~0x0000ff00;
sscr0 |= ((div - 2)/2) << 8; /* 2..512 */
} else {
@ -212,7 +211,7 @@ static u32 pxa_ssp_get_scr(struct ssp_device *ssp)
u32 sscr0 = pxa_ssp_read_reg(ssp, SSCR0);
u32 div;
if (cpu_is_pxa25x() && ssp->type == PXA25x_SSP)
if (ssp->type == PXA25x_SSP)
div = ((sscr0 >> 8) & 0xff) * 2 + 2;
else
div = ((sscr0 >> 8) & 0xfff) + 1;
@ -242,7 +241,7 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
break;
case PXA_SSP_CLK_PLL:
/* Internal PLL is fixed */
if (cpu_is_pxa25x())
if (ssp->type == PXA25x_SSP)
priv->sysclk = 1843200;
else
priv->sysclk = 13000000;
@ -266,11 +265,11 @@ static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
/* The SSP clock must be disabled when changing SSP clock mode
* on PXA2xx. On PXA3xx it must be enabled when doing so. */
if (!cpu_is_pxa3xx())
if (ssp->type != PXA3xx_SSP)
clk_disable(ssp->clk);
val = pxa_ssp_read_reg(ssp, SSCR0) | sscr0;
pxa_ssp_write_reg(ssp, SSCR0, val);
if (!cpu_is_pxa3xx())
if (ssp->type != PXA3xx_SSP)
clk_enable(ssp->clk);
return 0;
@ -294,24 +293,20 @@ static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
case PXA_SSP_AUDIO_DIV_SCDB:
val = pxa_ssp_read_reg(ssp, SSACD);
val &= ~SSACD_SCDB;
#if defined(CONFIG_PXA3xx)
if (cpu_is_pxa3xx())
if (ssp->type == PXA3xx_SSP)
val &= ~SSACD_SCDX8;
#endif
switch (div) {
case PXA_SSP_CLK_SCDB_1:
val |= SSACD_SCDB;
break;
case PXA_SSP_CLK_SCDB_4:
break;
#if defined(CONFIG_PXA3xx)
case PXA_SSP_CLK_SCDB_8:
if (cpu_is_pxa3xx())
if (ssp->type == PXA3xx_SSP)
val |= SSACD_SCDX8;
else
return -EINVAL;
break;
#endif
default:
return -EINVAL;
}
@ -337,10 +332,8 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
struct ssp_device *ssp = priv->ssp;
u32 ssacd = pxa_ssp_read_reg(ssp, SSACD) & ~0x70;
#if defined(CONFIG_PXA3xx)
if (cpu_is_pxa3xx())
if (ssp->type == PXA3xx_SSP)
pxa_ssp_write_reg(ssp, SSACDD, 0);
#endif
switch (freq_out) {
case 5622000:
@ -365,11 +358,10 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
break;
default:
#ifdef CONFIG_PXA3xx
/* PXA3xx has a clock ditherer which can be used to generate
* a wider range of frequencies - calculate a value for it.
*/
if (cpu_is_pxa3xx()) {
if (ssp->type == PXA3xx_SSP) {
u32 val;
u64 tmp = 19968;
tmp *= 1000000;
@ -386,7 +378,6 @@ static int pxa_ssp_set_dai_pll(struct snd_soc_dai *cpu_dai, int pll_id,
val, freq_out);
break;
}
#endif
return -EINVAL;
}
@ -590,10 +581,8 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
/* bit size */
switch (params_format(params)) {
case SNDRV_PCM_FORMAT_S16_LE:
#ifdef CONFIG_PXA3xx
if (cpu_is_pxa3xx())
if (ssp->type == PXA3xx_SSP)
sscr0 |= SSCR0_FPCKE;
#endif
sscr0 |= SSCR0_DataSize(16);
break;
case SNDRV_PCM_FORMAT_S24_LE:
@ -618,9 +607,7 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
* trying and failing a lot; some of the registers
* needed for that mode are only available on PXA3xx.
*/
#ifdef CONFIG_PXA3xx
if (!cpu_is_pxa3xx())
if (ssp->type != PXA3xx_SSP)
return -EINVAL;
sspsp |= SSPSP_SFRMWDTH(width * 2);
@ -628,9 +615,6 @@ static int pxa_ssp_hw_params(struct snd_pcm_substream *substream,
sspsp |= SSPSP_EDMYSTOP(3);
sspsp |= SSPSP_DMYSTOP(3);
sspsp |= SSPSP_DMYSTRT(1);
#else
return -EINVAL;
#endif
} else {
/* The frame width is the width the LRCLK is
* asserted for; the delay is expressed in

13
sound/soc/tegra/tegra_wm8903.c
View File

@ -346,6 +346,17 @@ static int tegra_wm8903_init(struct snd_soc_pcm_runtime *rtd)
return 0;
}
static int tegra_wm8903_remove(struct snd_soc_card *card)
{
struct snd_soc_pcm_runtime *rtd = &(card->rtd[0]);
struct snd_soc_dai *codec_dai = rtd->codec_dai;
struct snd_soc_codec *codec = codec_dai->codec;
wm8903_mic_detect(codec, NULL, 0, 0);
return 0;
}
static struct snd_soc_dai_link tegra_wm8903_dai = {
.name = "WM8903",
.stream_name = "WM8903 PCM",
@ -363,6 +374,8 @@ static struct snd_soc_card snd_soc_tegra_wm8903 = {
.dai_link = &tegra_wm8903_dai,
.num_links = 1,
.remove = tegra_wm8903_remove,
.controls = tegra_wm8903_controls,
.num_controls = ARRAY_SIZE(tegra_wm8903_controls),
.dapm_widgets = tegra_wm8903_dapm_widgets,