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Merge 3.16-rc2 into staging-next 

We want the staging fixes here as well.
This commit is contained in:
Greg Kroah-Hartman 2014-06-22 12:33:51 -04:00
parent ad8686bc05 a497c3ba1d
commit ef7994fa2a
499 changed files with 7718 additions and 4327 deletions
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4
Documentation/DocBook/media/Makefile
View File

@ -202,8 +202,8 @@ $(MEDIA_OBJ_DIR)/%: $(MEDIA_SRC_DIR)/%.b64
$(MEDIA_OBJ_DIR)/v4l2.xml: $(OBJIMGFILES) $(MEDIA_OBJ_DIR)/v4l2.xml: $(OBJIMGFILES)
@$($(quiet)gen_xml) @$($(quiet)gen_xml)
@(ln -sf $(MEDIA_SRC_DIR)/v4l/*xml $(MEDIA_OBJ_DIR)/) @(ln -sf `cd $(MEDIA_SRC_DIR) && /bin/pwd`/v4l/*xml $(MEDIA_OBJ_DIR)/)
@(ln -sf $(MEDIA_SRC_DIR)/dvb/*xml $(MEDIA_OBJ_DIR)/) @(ln -sf `cd $(MEDIA_SRC_DIR) && /bin/pwd`/dvb/*xml $(MEDIA_OBJ_DIR)/)
$(MEDIA_OBJ_DIR)/videodev2.h.xml: $(srctree)/include/uapi/linux/videodev2.h $(MEDIA_OBJ_DIR)/v4l2.xml $(MEDIA_OBJ_DIR)/videodev2.h.xml: $(srctree)/include/uapi/linux/videodev2.h $(MEDIA_OBJ_DIR)/v4l2.xml
@$($(quiet)gen_xml) @$($(quiet)gen_xml)

42
Documentation/devicetree/bindings/i2c/i2c-rk3x.txt Normal file
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@ -0,0 +1,42 @@
* Rockchip RK3xxx I2C controller
This driver interfaces with the native I2C controller present in Rockchip
RK3xxx SoCs.
Required properties :
- reg : Offset and length of the register set for the device
- compatible : should be "rockchip,rk3066-i2c", "rockchip,rk3188-i2c" or
"rockchip,rk3288-i2c".
- interrupts : interrupt number
- clocks : parent clock
Required on RK3066, RK3188 :
- rockchip,grf : the phandle of the syscon node for the general register
file (GRF)
- on those SoCs an alias with the correct I2C bus ID (bit offset in the GRF)
is also required.
Optional properties :
- clock-frequency : SCL frequency to use (in Hz). If omitted, 100kHz is used.
Example:
aliases {
i2c0 = &i2c0;
}
i2c0: i2c@2002d000 {
compatible = "rockchip,rk3188-i2c";
reg = <0x2002d000 0x1000>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
rockchip,grf = <&grf>;
clock-names = "i2c";
clocks = <&cru PCLK_I2C0>;
};

41
Documentation/devicetree/bindings/i2c/i2c-sunxi-p2wi.txt Normal file
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@ -0,0 +1,41 @@
* Allwinner P2WI (Push/Pull 2 Wire Interface) controller
Required properties :
- reg : Offset and length of the register set for the device.
- compatible : Should one of the following:
- "allwinner,sun6i-a31-p2wi"
- interrupts : The interrupt line connected to the P2WI peripheral.
- clocks : The gate clk connected to the P2WI peripheral.
- resets : The reset line connected to the P2WI peripheral.
Optional properties :
- clock-frequency : Desired P2WI bus clock frequency in Hz. If not set the
default frequency is 100kHz
A P2WI may contain one child node encoding a P2WI slave device.
Slave device properties:
Required properties:
- reg : the I2C slave address used during the initialization
process to switch from I2C to P2WI mode
Example:
p2wi@01f03400 {
compatible = "allwinner,sun6i-a31-p2wi";
reg = <0x01f03400 0x400>;
interrupts = <0 39 4>;
clocks = <&apb0_gates 3>;
clock-frequency = <6000000>;
resets = <&apb0_rst 3>;
axp221: pmic@68 {
compatible = "x-powers,axp221";
reg = <0x68>;
/* ... */
};
};

2
Documentation/kbuild/makefiles.txt
View File

@ -1171,7 +1171,7 @@ When kbuild executes, the following steps are followed (roughly):
obvious reason. obvious reason.
dtc dtc
Create flattend device tree blob object suitable for linking Create flattened device tree blob object suitable for linking
into vmlinux. Device tree blobs linked into vmlinux are placed into vmlinux. Device tree blobs linked into vmlinux are placed
in an init section in the image. Platform code *must* copy the in an init section in the image. Platform code *must* copy the
blob to non-init memory prior to calling unflatten_device_tree(). blob to non-init memory prior to calling unflatten_device_tree().

14
Documentation/kernel-parameters.txt
View File

@ -1474,6 +1474,13 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
js= [HW,JOY] Analog joystick js= [HW,JOY] Analog joystick
See Documentation/input/joystick.txt. See Documentation/input/joystick.txt.
kaslr/nokaslr [X86]
Enable/disable kernel and module base offset ASLR
(Address Space Layout Randomization) if built into
the kernel. When CONFIG_HIBERNATION is selected,
kASLR is disabled by default. When kASLR is enabled,
hibernation will be disabled.
keepinitrd [HW,ARM] keepinitrd [HW,ARM]
kernelcore=nn[KMG] [KNL,X86,IA-64,PPC] This parameter kernelcore=nn[KMG] [KNL,X86,IA-64,PPC] This parameter
@ -2110,10 +2117,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
noapic [SMP,APIC] Tells the kernel to not make use of any noapic [SMP,APIC] Tells the kernel to not make use of any
IOAPICs that may be present in the system. IOAPICs that may be present in the system.
nokaslr [X86]
Disable kernel and module base offset ASLR (Address
Space Layout Randomization) if built into the kernel.
noautogroup Disable scheduler automatic task group creation. noautogroup Disable scheduler automatic task group creation.
nobats [PPC] Do not use BATs for mapping kernel lowmem nobats [PPC] Do not use BATs for mapping kernel lowmem
@ -2184,6 +2187,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
in certain environments such as networked servers or in certain environments such as networked servers or
real-time systems. real-time systems.
nohibernate [HIBERNATION] Disable hibernation and resume.
nohz= [KNL] Boottime enable/disable dynamic ticks nohz= [KNL] Boottime enable/disable dynamic ticks
Valid arguments: on, off Valid arguments: on, off
Default: on Default: on
@ -2980,6 +2985,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
noresume Don't check if there's a hibernation image noresume Don't check if there's a hibernation image
present during boot. present during boot.
nocompress Don't compress/decompress hibernation images. nocompress Don't compress/decompress hibernation images.
no Disable hibernation and resume.
retain_initrd [RAM] Keep initrd memory after extraction retain_initrd [RAM] Keep initrd memory after extraction

7
Documentation/thermal/nouveau_thermal
View File

@ -4,7 +4,7 @@ Kernel driver nouveau
Supported chips: Supported chips:
* NV43+ * NV43+
Authors: Martin Peres (mupuf) <martin.peres@labri.fr> Authors: Martin Peres (mupuf) <martin.peres@free.fr>
Description Description
--------- ---------
@ -68,8 +68,9 @@ Your fan can be driven in different modes:
NOTE: Be sure to use the manual mode if you want to drive the fan speed manually NOTE: Be sure to use the manual mode if you want to drive the fan speed manually
NOTE2: Not all fan management modes may be supported on all chipsets. We are NOTE2: When operating in manual mode outside the vbios-defined
working on it. [PWM_min, PWM_max] range, the reported fan speed (RPM) may not be accurate
depending on your hardware.
Bug reports Bug reports
--------- ---------

13
MAINTAINERS
View File

@ -6960,7 +6960,7 @@ PKUNITY SOC DRIVERS
M: Guan Xuetao <gxt@mprc.pku.edu.cn> M: Guan Xuetao <gxt@mprc.pku.edu.cn>
W: http://mprc.pku.edu.cn/~guanxuetao/linux W: http://mprc.pku.edu.cn/~guanxuetao/linux
S: Maintained S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/epip/linux-2.6-unicore32.git T: git git://github.com/gxt/linux.git
F: drivers/input/serio/i8042-unicore32io.h F: drivers/input/serio/i8042-unicore32io.h
F: drivers/i2c/busses/i2c-puv3.c F: drivers/i2c/busses/i2c-puv3.c
F: drivers/video/fb-puv3.c F: drivers/video/fb-puv3.c
@ -7948,6 +7948,7 @@ F: drivers/mmc/host/sdhci-spear.c
SECURITY SUBSYSTEM SECURITY SUBSYSTEM
M: James Morris <james.l.morris@oracle.com> M: James Morris <james.l.morris@oracle.com>
M: Serge E. Hallyn <serge@hallyn.com>
L: linux-security-module@vger.kernel.org (suggested Cc:) L: linux-security-module@vger.kernel.org (suggested Cc:)
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security.git
W: http://kernsec.org/ W: http://kernsec.org/
@ -9268,7 +9269,7 @@ UNICORE32 ARCHITECTURE:
M: Guan Xuetao <gxt@mprc.pku.edu.cn> M: Guan Xuetao <gxt@mprc.pku.edu.cn>
W: http://mprc.pku.edu.cn/~guanxuetao/linux W: http://mprc.pku.edu.cn/~guanxuetao/linux
S: Maintained S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/epip/linux-2.6-unicore32.git T: git git://github.com/gxt/linux.git
F: arch/unicore32/ F: arch/unicore32/
UNIFDEF UNIFDEF
@ -9735,6 +9736,14 @@ L: virtualization@lists.linux-foundation.org
S: Supported S: Supported
F: arch/x86/kernel/cpu/vmware.c F: arch/x86/kernel/cpu/vmware.c
VMWARE BALLOON DRIVER
M: Xavier Deguillard <xdeguillard@vmware.com>
M: Philip Moltmann <moltmann@vmware.com>
M: "VMware, Inc." <pv-drivers@vmware.com>
L: linux-kernel@vger.kernel.org
S: Maintained
F: drivers/misc/vmw_balloon.c
VMWARE VMXNET3 ETHERNET DRIVER VMWARE VMXNET3 ETHERNET DRIVER
M: Shreyas Bhatewara <sbhatewara@vmware.com> M: Shreyas Bhatewara <sbhatewara@vmware.com>
M: "VMware, Inc." <pv-drivers@vmware.com> M: "VMware, Inc." <pv-drivers@vmware.com>

2
Makefile
View File

@ -1,7 +1,7 @@
VERSION = 3 VERSION = 3
PATCHLEVEL = 16 PATCHLEVEL = 16
SUBLEVEL = 0 SUBLEVEL = 0
EXTRAVERSION = -rc1 EXTRAVERSION = -rc2
NAME = Shuffling Zombie Juror NAME = Shuffling Zombie Juror
# *DOCUMENTATION* # *DOCUMENTATION*

20
arch/arm/Kconfig
View File

@ -175,13 +175,6 @@ config ARCH_HAS_ILOG2_U32
config ARCH_HAS_ILOG2_U64 config ARCH_HAS_ILOG2_U64
bool bool
config ARCH_HAS_CPUFREQ
bool
help
Internal node to signify that the ARCH has CPUFREQ support
and that the relevant menu configurations are displayed for
it.
config ARCH_HAS_BANDGAP config ARCH_HAS_BANDGAP
bool bool
@ -318,7 +311,6 @@ config ARCH_MULTIPLATFORM
config ARCH_INTEGRATOR config ARCH_INTEGRATOR
bool "ARM Ltd. Integrator family" bool "ARM Ltd. Integrator family"
select ARCH_HAS_CPUFREQ
select ARM_AMBA select ARM_AMBA
select ARM_PATCH_PHYS_VIRT select ARM_PATCH_PHYS_VIRT
select AUTO_ZRELADDR select AUTO_ZRELADDR
@ -538,7 +530,6 @@ config ARCH_DOVE
config ARCH_KIRKWOOD config ARCH_KIRKWOOD
bool "Marvell Kirkwood" bool "Marvell Kirkwood"
select ARCH_HAS_CPUFREQ
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select CPU_FEROCEON select CPU_FEROCEON
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
@ -637,7 +628,6 @@ config ARCH_LPC32XX
config ARCH_PXA config ARCH_PXA
bool "PXA2xx/PXA3xx-based" bool "PXA2xx/PXA3xx-based"
depends on MMU depends on MMU
select ARCH_HAS_CPUFREQ
select ARCH_MTD_XIP select ARCH_MTD_XIP
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select ARM_CPU_SUSPEND if PM select ARM_CPU_SUSPEND if PM
@ -707,7 +697,6 @@ config ARCH_RPC
config ARCH_SA1100 config ARCH_SA1100
bool "SA1100-based" bool "SA1100-based"
select ARCH_HAS_CPUFREQ
select ARCH_MTD_XIP select ARCH_MTD_XIP
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select ARCH_SPARSEMEM_ENABLE select ARCH_SPARSEMEM_ENABLE
@ -725,7 +714,6 @@ config ARCH_SA1100
config ARCH_S3C24XX config ARCH_S3C24XX
bool "Samsung S3C24XX SoCs" bool "Samsung S3C24XX SoCs"
select ARCH_HAS_CPUFREQ
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select ATAGS select ATAGS
select CLKDEV_LOOKUP select CLKDEV_LOOKUP
@ -746,7 +734,6 @@ config ARCH_S3C24XX
config ARCH_S3C64XX config ARCH_S3C64XX
bool "Samsung S3C64XX" bool "Samsung S3C64XX"
select ARCH_HAS_CPUFREQ
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select ARM_AMBA select ARM_AMBA
select ARM_VIC select ARM_VIC
@ -809,7 +796,6 @@ config ARCH_S5PC100
config ARCH_S5PV210 config ARCH_S5PV210
bool "Samsung S5PV210/S5PC110" bool "Samsung S5PV210/S5PC110"
select ARCH_HAS_CPUFREQ
select ARCH_HAS_HOLES_MEMORYMODEL select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_SPARSEMEM_ENABLE select ARCH_SPARSEMEM_ENABLE
select ATAGS select ATAGS
@ -845,7 +831,6 @@ config ARCH_DAVINCI
config ARCH_OMAP1 config ARCH_OMAP1
bool "TI OMAP1" bool "TI OMAP1"
depends on MMU depends on MMU
select ARCH_HAS_CPUFREQ
select ARCH_HAS_HOLES_MEMORYMODEL select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_OMAP select ARCH_OMAP
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
@ -1009,8 +994,6 @@ source "arch/arm/mach-rockchip/Kconfig"
source "arch/arm/mach-sa1100/Kconfig" source "arch/arm/mach-sa1100/Kconfig"
source "arch/arm/plat-samsung/Kconfig"
source "arch/arm/mach-socfpga/Kconfig" source "arch/arm/mach-socfpga/Kconfig"
source "arch/arm/mach-spear/Kconfig" source "arch/arm/mach-spear/Kconfig"
@ -1028,6 +1011,7 @@ source "arch/arm/mach-s5pc100/Kconfig"
source "arch/arm/mach-s5pv210/Kconfig" source "arch/arm/mach-s5pv210/Kconfig"
source "arch/arm/mach-exynos/Kconfig" source "arch/arm/mach-exynos/Kconfig"
source "arch/arm/plat-samsung/Kconfig"
source "arch/arm/mach-shmobile/Kconfig" source "arch/arm/mach-shmobile/Kconfig"
@ -2109,9 +2093,7 @@ endmenu
menu "CPU Power Management" menu "CPU Power Management"
if ARCH_HAS_CPUFREQ
source "drivers/cpufreq/Kconfig" source "drivers/cpufreq/Kconfig"
endif
source "drivers/cpuidle/Kconfig" source "drivers/cpuidle/Kconfig"

2
arch/arm/boot/dts/armada-375-db.dts
View File

@ -91,6 +91,8 @@
marvell,nand-keep-config; marvell,nand-keep-config;
marvell,nand-enable-arbiter; marvell,nand-enable-arbiter;
nand-on-flash-bbt; nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partition@0 { partition@0 {
label = "U-Boot"; label = "U-Boot";

2
arch/arm/boot/dts/armada-385-db.dts
View File

@ -98,6 +98,8 @@
marvell,nand-keep-config; marvell,nand-keep-config;
marvell,nand-enable-arbiter; marvell,nand-enable-arbiter;
nand-on-flash-bbt; nand-on-flash-bbt;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
partition@0 { partition@0 {
label = "U-Boot"; label = "U-Boot";

2
arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dts
View File

@ -25,7 +25,7 @@
memory { memory {
device_type = "memory"; device_type = "memory";
reg = <0 0x00000000 0 0xC0000000>; /* 3 GB */ reg = <0 0x00000000 0 0x40000000>; /* 1 GB soldered on */
}; };
soc { soc {

1
arch/arm/configs/multi_v7_defconfig
View File

@ -300,6 +300,7 @@ CONFIG_MMC=y
CONFIG_MMC_BLOCK_MINORS=16 CONFIG_MMC_BLOCK_MINORS=16
CONFIG_MMC_ARMMMCI=y CONFIG_MMC_ARMMMCI=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_OF_ARASAN=y CONFIG_MMC_SDHCI_OF_ARASAN=y
CONFIG_MMC_SDHCI_ESDHC_IMX=y CONFIG_MMC_SDHCI_ESDHC_IMX=y
CONFIG_MMC_SDHCI_DOVE=y CONFIG_MMC_SDHCI_DOVE=y

1
arch/arm/configs/omap2plus_defconfig
View File

@ -32,6 +32,7 @@ CONFIG_SOC_OMAP5=y
CONFIG_SOC_AM33XX=y CONFIG_SOC_AM33XX=y
CONFIG_SOC_AM43XX=y CONFIG_SOC_AM43XX=y
CONFIG_SOC_DRA7XX=y CONFIG_SOC_DRA7XX=y
CONFIG_CACHE_L2X0=y
CONFIG_ARM_THUMBEE=y CONFIG_ARM_THUMBEE=y
CONFIG_ARM_ERRATA_411920=y CONFIG_ARM_ERRATA_411920=y
CONFIG_SMP=y CONFIG_SMP=y

2
arch/arm/include/asm/ftrace.h
View File

@ -52,7 +52,7 @@ extern inline void *return_address(unsigned int level)
#endif #endif
#define ftrace_return_addr(n) return_address(n) #define ftrace_return_address(n) return_address(n)
#endif /* ifndef __ASSEMBLY__ */ #endif /* ifndef __ASSEMBLY__ */

7
arch/arm/mach-bcm/Kconfig
View File

@ -1,10 +1,9 @@
config ARCH_BCM menuconfig ARCH_BCM
bool "Broadcom SoC Support" if ARCH_MULTI_V6_V7 bool "Broadcom SoC Support" if ARCH_MULTI_V6_V7
help help
This enables support for Broadcom ARM based SoC chips This enables support for Broadcom ARM based SoC chips
menu "Broadcom SoC Selection" if ARCH_BCM
depends on ARCH_BCM
config ARCH_BCM_MOBILE config ARCH_BCM_MOBILE
bool "Broadcom Mobile SoC Support" if ARCH_MULTI_V7 bool "Broadcom Mobile SoC Support" if ARCH_MULTI_V7
@ -88,4 +87,4 @@ config ARCH_BCM_5301X
different SoC or with the older BCM47XX and BCM53XX based different SoC or with the older BCM47XX and BCM53XX based
network SoC using a MIPS CPU, they are supported by arch/mips/bcm47xx network SoC using a MIPS CPU, they are supported by arch/mips/bcm47xx
endmenu endif

6
arch/arm/mach-berlin/Kconfig
View File

@ -1,4 +1,4 @@
config ARCH_BERLIN menuconfig ARCH_BERLIN
bool "Marvell Berlin SoCs" if ARCH_MULTI_V7 bool "Marvell Berlin SoCs" if ARCH_MULTI_V7
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select ARM_GIC select ARM_GIC
@ -9,8 +9,6 @@ config ARCH_BERLIN
if ARCH_BERLIN if ARCH_BERLIN
menu "Marvell Berlin SoC variants"
config MACH_BERLIN_BG2 config MACH_BERLIN_BG2
bool "Marvell Armada 1500 (BG2)" bool "Marvell Armada 1500 (BG2)"
select CACHE_L2X0 select CACHE_L2X0
@ -30,6 +28,4 @@ config MACH_BERLIN_BG2Q
select HAVE_ARM_TWD if SMP select HAVE_ARM_TWD if SMP
select PINCTRL_BERLIN_BG2Q select PINCTRL_BERLIN_BG2Q
endmenu
endif endif

7
arch/arm/mach-cns3xxx/Kconfig
View File

@ -1,12 +1,11 @@
config ARCH_CNS3XXX menuconfig ARCH_CNS3XXX
bool "Cavium Networks CNS3XXX family" if ARCH_MULTI_V6 bool "Cavium Networks CNS3XXX family" if ARCH_MULTI_V6
select ARM_GIC select ARM_GIC
select PCI_DOMAINS if PCI select PCI_DOMAINS if PCI
help help
Support for Cavium Networks CNS3XXX platform. Support for Cavium Networks CNS3XXX platform.
menu "CNS3XXX platform type" if ARCH_CNS3XXX
depends on ARCH_CNS3XXX
config MACH_CNS3420VB config MACH_CNS3420VB
bool "Support for CNS3420 Validation Board" bool "Support for CNS3420 Validation Board"
@ -17,4 +16,4 @@ config MACH_CNS3420VB
This is a platform with an on-board ARM11 MPCore and has support This is a platform with an on-board ARM11 MPCore and has support
for USB, USB-OTG, MMC/SD/SDIO, SATA, PCI-E, etc. for USB, USB-OTG, MMC/SD/SDIO, SATA, PCI-E, etc.
endmenu endif

1
arch/arm/mach-davinci/Kconfig
View File

@ -39,7 +39,6 @@ config ARCH_DAVINCI_DA830
config ARCH_DAVINCI_DA850 config ARCH_DAVINCI_DA850
bool "DA850/OMAP-L138/AM18x based system" bool "DA850/OMAP-L138/AM18x based system"
select ARCH_DAVINCI_DA8XX select ARCH_DAVINCI_DA8XX
select ARCH_HAS_CPUFREQ
select CP_INTC select CP_INTC
config ARCH_DAVINCI_DA8XX config ARCH_DAVINCI_DA8XX

7
arch/arm/mach-exynos/Kconfig
View File

@ -7,10 +7,9 @@
# Configuration options for the EXYNOS4 # Configuration options for the EXYNOS4
config ARCH_EXYNOS menuconfig ARCH_EXYNOS
bool "Samsung EXYNOS" if ARCH_MULTI_V7 bool "Samsung EXYNOS" if ARCH_MULTI_V7
select ARCH_HAS_BANDGAP select ARCH_HAS_BANDGAP
select ARCH_HAS_CPUFREQ
select ARCH_HAS_HOLES_MEMORYMODEL select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select ARM_AMBA select ARM_AMBA
@ -30,8 +29,6 @@ config ARCH_EXYNOS
if ARCH_EXYNOS if ARCH_EXYNOS
menu "SAMSUNG EXYNOS SoCs Support"
config ARCH_EXYNOS3 config ARCH_EXYNOS3
bool "SAMSUNG EXYNOS3" bool "SAMSUNG EXYNOS3"
select ARM_CPU_SUSPEND if PM select ARM_CPU_SUSPEND if PM
@ -118,8 +115,6 @@ config SOC_EXYNOS5800
default y default y
depends on SOC_EXYNOS5420 depends on SOC_EXYNOS5420
endmenu
config EXYNOS5420_MCPM config EXYNOS5420_MCPM
bool "Exynos5420 Multi-Cluster PM support" bool "Exynos5420 Multi-Cluster PM support"
depends on MCPM && SOC_EXYNOS5420 depends on MCPM && SOC_EXYNOS5420

1
arch/arm/mach-exynos/common.h
View File

@ -118,6 +118,7 @@ extern void __iomem *sysram_ns_base_addr;
extern void __iomem *sysram_base_addr; extern void __iomem *sysram_base_addr;
void exynos_init_io(void); void exynos_init_io(void);
void exynos_restart(enum reboot_mode mode, const char *cmd); void exynos_restart(enum reboot_mode mode, const char *cmd);
void exynos_sysram_init(void);
void exynos_cpuidle_init(void); void exynos_cpuidle_init(void);
void exynos_cpufreq_init(void); void exynos_cpufreq_init(void);
void exynos_init_late(void); void exynos_init_late(void);

31
arch/arm/mach-exynos/exynos.c
View File

@ -184,6 +184,28 @@ void __init exynos_cpufreq_init(void)
platform_device_register_simple("exynos-cpufreq", -1, NULL, 0); platform_device_register_simple("exynos-cpufreq", -1, NULL, 0);
} }
void __iomem *sysram_base_addr;
void __iomem *sysram_ns_base_addr;
void __init exynos_sysram_init(void)
{
struct device_node *node;
for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") {
if (!of_device_is_available(node))
continue;
sysram_base_addr = of_iomap(node, 0);
break;
}
for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") {
if (!of_device_is_available(node))
continue;
sysram_ns_base_addr = of_iomap(node, 0);
break;
}
}
void __init exynos_init_late(void) void __init exynos_init_late(void)
{ {
if (of_machine_is_compatible("samsung,exynos5440")) if (of_machine_is_compatible("samsung,exynos5440"))
@ -198,7 +220,7 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
int depth, void *data) int depth, void *data)
{ {
struct map_desc iodesc; struct map_desc iodesc;
__be32 *reg; const __be32 *reg;
int len; int len;
if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid") && if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid") &&
@ -271,6 +293,13 @@ static void __init exynos_dt_machine_init(void)
} }
} }
/*
* This is called from smp_prepare_cpus if we've built for SMP, but
* we still need to set it up for PM and firmware ops if not.
*/
if (!IS_ENABLED(SMP))
exynos_sysram_init();
exynos_cpuidle_init(); exynos_cpuidle_init();
exynos_cpufreq_init(); exynos_cpufreq_init();

26
arch/arm/mach-exynos/platsmp.c
View File

@ -32,28 +32,6 @@
extern void exynos4_secondary_startup(void); extern void exynos4_secondary_startup(void);
void __iomem *sysram_base_addr;
void __iomem *sysram_ns_base_addr;
static void __init exynos_smp_prepare_sysram(void)
{
struct device_node *node;
for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") {
if (!of_device_is_available(node))
continue;
sysram_base_addr = of_iomap(node, 0);
break;
}
for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") {
if (!of_device_is_available(node))
continue;
sysram_ns_base_addr = of_iomap(node, 0);
break;
}
}
static inline void __iomem *cpu_boot_reg_base(void) static inline void __iomem *cpu_boot_reg_base(void)
{ {
if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1) if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
@ -234,11 +212,11 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
{ {
int i; int i;
exynos_sysram_init();
if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9) if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
scu_enable(scu_base_addr()); scu_enable(scu_base_addr());
exynos_smp_prepare_sysram();
/* /*
* Write the address of secondary startup into the * Write the address of secondary startup into the
* system-wide flags register. The boot monitor waits * system-wide flags register. The boot monitor waits

1
arch/arm/mach-highbank/Kconfig
View File

@ -1,7 +1,6 @@
config ARCH_HIGHBANK config ARCH_HIGHBANK
bool "Calxeda ECX-1000/2000 (Highbank/Midway)" if ARCH_MULTI_V7 bool "Calxeda ECX-1000/2000 (Highbank/Midway)" if ARCH_MULTI_V7
select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
select ARCH_HAS_CPUFREQ
select ARCH_HAS_HOLES_MEMORYMODEL select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_HAS_OPP select ARCH_HAS_OPP
select ARCH_SUPPORTS_BIG_ENDIAN select ARCH_SUPPORTS_BIG_ENDIAN

10
arch/arm/mach-imx/Kconfig
View File

@ -1,6 +1,5 @@
config ARCH_MXC menuconfig ARCH_MXC
bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7
select ARCH_HAS_CPUFREQ
select ARCH_HAS_OPP select ARCH_HAS_OPP
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select ARM_CPU_SUSPEND if PM select ARM_CPU_SUSPEND if PM
@ -13,8 +12,7 @@ config ARCH_MXC
help help
Support for Freescale MXC/iMX-based family of processors Support for Freescale MXC/iMX-based family of processors
menu "Freescale i.MX support" if ARCH_MXC
depends on ARCH_MXC
config MXC_TZIC config MXC_TZIC
bool bool
@ -99,7 +97,6 @@ config SOC_IMX25
config SOC_IMX27 config SOC_IMX27
bool bool
select ARCH_HAS_CPUFREQ
select ARCH_HAS_OPP select ARCH_HAS_OPP
select CPU_ARM926T select CPU_ARM926T
select IMX_HAVE_IOMUX_V1 select IMX_HAVE_IOMUX_V1
@ -124,7 +121,6 @@ config SOC_IMX35
config SOC_IMX5 config SOC_IMX5
bool bool
select ARCH_HAS_CPUFREQ
select ARCH_HAS_OPP select ARCH_HAS_OPP
select ARCH_MXC_IOMUX_V3 select ARCH_MXC_IOMUX_V3
select MXC_TZIC select MXC_TZIC
@ -786,4 +782,4 @@ endif
source "arch/arm/mach-imx/devices/Kconfig" source "arch/arm/mach-imx/devices/Kconfig"
endmenu endif

2
arch/arm/mach-integrator/Kconfig
View File

@ -28,7 +28,7 @@ config ARCH_CINTEGRATOR
bool bool
config INTEGRATOR_IMPD1 config INTEGRATOR_IMPD1
tristate "Include support for Integrator/IM-PD1" bool "Include support for Integrator/IM-PD1"
depends on ARCH_INTEGRATOR_AP depends on ARCH_INTEGRATOR_AP
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select ARM_VIC select ARM_VIC

12
arch/arm/mach-integrator/impd1.c
View File

@ -308,7 +308,12 @@ static struct impd1_device impd1_devs[] = {
*/ */
#define IMPD1_VALID_IRQS 0x00000bffU #define IMPD1_VALID_IRQS 0x00000bffU
static int __init impd1_probe(struct lm_device *dev) /*
* As this module is bool, it is OK to have this as __init_refok() - no
* probe calls will be done after the initial system bootup, as devices
* are discovered as part of the machine startup.
*/
static int __init_refok impd1_probe(struct lm_device *dev)
{ {
struct impd1_module *impd1; struct impd1_module *impd1;
int irq_base; int irq_base;
@ -397,6 +402,11 @@ static void impd1_remove(struct lm_device *dev)
static struct lm_driver impd1_driver = { static struct lm_driver impd1_driver = {
.drv = { .drv = {
.name = "impd1", .name = "impd1",
/*
* As we're dropping the probe() function, suppress driver
* binding from sysfs.
*/
.suppress_bind_attrs = true,
}, },
.probe = impd1_probe, .probe = impd1_probe,
.remove = impd1_remove, .remove = impd1_remove,

1
arch/arm/mach-keystone/Kconfig
View File

@ -1,6 +1,7 @@
config ARCH_KEYSTONE config ARCH_KEYSTONE
bool "Texas Instruments Keystone Devices" bool "Texas Instruments Keystone Devices"
depends on ARCH_MULTI_V7 depends on ARCH_MULTI_V7
depends on ARM_PATCH_PHYS_VIRT
select ARM_GIC select ARM_GIC
select HAVE_ARM_ARCH_TIMER select HAVE_ARM_ARCH_TIMER
select CLKSRC_MMIO select CLKSRC_MMIO

2
arch/arm/mach-moxart/Kconfig
View File

@ -1,4 +1,4 @@
config ARCH_MOXART menuconfig ARCH_MOXART
bool "MOXA ART SoC" if ARCH_MULTI_V4 bool "MOXA ART SoC" if ARCH_MULTI_V4
select CPU_FA526 select CPU_FA526
select ARM_DMA_MEM_BUFFERABLE select ARM_DMA_MEM_BUFFERABLE

7
arch/arm/mach-mvebu/Kconfig
View File

@ -1,4 +1,4 @@
config ARCH_MVEBU menuconfig ARCH_MVEBU
bool "Marvell Engineering Business Unit (MVEBU) SoCs" if (ARCH_MULTI_V7 || ARCH_MULTI_V5) bool "Marvell Engineering Business Unit (MVEBU) SoCs" if (ARCH_MULTI_V7 || ARCH_MULTI_V5)
select ARCH_SUPPORTS_BIG_ENDIAN select ARCH_SUPPORTS_BIG_ENDIAN
select CLKSRC_MMIO select CLKSRC_MMIO
@ -13,8 +13,6 @@ config ARCH_MVEBU
if ARCH_MVEBU if ARCH_MVEBU
menu "Marvell EBU SoC variants"
config MACH_MVEBU_V7 config MACH_MVEBU_V7
bool bool
select ARMADA_370_XP_TIMER select ARMADA_370_XP_TIMER
@ -84,7 +82,6 @@ config MACH_DOVE
config MACH_KIRKWOOD config MACH_KIRKWOOD
bool "Marvell Kirkwood boards" if ARCH_MULTI_V5 bool "Marvell Kirkwood boards" if ARCH_MULTI_V5
select ARCH_HAS_CPUFREQ
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select CPU_FEROCEON select CPU_FEROCEON
select KIRKWOOD_CLK select KIRKWOOD_CLK
@ -97,6 +94,4 @@ config MACH_KIRKWOOD
Say 'Y' here if you want your kernel to support boards based Say 'Y' here if you want your kernel to support boards based
on the Marvell Kirkwood device tree. on the Marvell Kirkwood device tree.
endmenu
endif endif

4
arch/arm/mach-nomadik/Kconfig
View File

@ -1,4 +1,4 @@
config ARCH_NOMADIK menuconfig ARCH_NOMADIK
bool "ST-Ericsson Nomadik" bool "ST-Ericsson Nomadik"
depends on ARCH_MULTI_V5 depends on ARCH_MULTI_V5
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
@ -15,7 +15,6 @@ config ARCH_NOMADIK
Support for the Nomadik platform by ST-Ericsson Support for the Nomadik platform by ST-Ericsson
if ARCH_NOMADIK if ARCH_NOMADIK
menu "Nomadik boards"
config MACH_NOMADIK_8815NHK config MACH_NOMADIK_8815NHK
bool "ST 8815 Nomadik Hardware Kit (evaluation board)" bool "ST 8815 Nomadik Hardware Kit (evaluation board)"
@ -24,7 +23,6 @@ config MACH_NOMADIK_8815NHK
select I2C_ALGOBIT select I2C_ALGOBIT
select I2C_NOMADIK select I2C_NOMADIK
endmenu
endif endif
config NOMADIK_8815 config NOMADIK_8815

7
arch/arm/mach-omap2/Kconfig
View File

@ -1,3 +1,6 @@
menu "TI OMAP/AM/DM/DRA Family"
depends on ARCH_MULTI_V6 || ARCH_MULTI_V7
config ARCH_OMAP config ARCH_OMAP
bool bool
@ -28,7 +31,6 @@ config ARCH_OMAP4
select ARM_CPU_SUSPEND if PM select ARM_CPU_SUSPEND if PM
select ARM_ERRATA_720789 select ARM_ERRATA_720789
select ARM_GIC select ARM_GIC
select CACHE_L2X0
select HAVE_ARM_SCU if SMP select HAVE_ARM_SCU if SMP
select HAVE_ARM_TWD if SMP select HAVE_ARM_TWD if SMP
select OMAP_INTERCONNECT select OMAP_INTERCONNECT
@ -80,7 +82,6 @@ config SOC_DRA7XX
config ARCH_OMAP2PLUS config ARCH_OMAP2PLUS
bool bool
select ARCH_HAS_BANDGAP select ARCH_HAS_BANDGAP
select ARCH_HAS_CPUFREQ
select ARCH_HAS_HOLES_MEMORYMODEL select ARCH_HAS_HOLES_MEMORYMODEL
select ARCH_OMAP select ARCH_OMAP
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
@ -343,3 +344,5 @@ config OMAP4_ERRATA_I688
endmenu endmenu
endif endif
endmenu

7
arch/arm/mach-omap2/common.h
View File

@ -91,7 +91,14 @@ extern void omap3_sync32k_timer_init(void);
extern void omap3_secure_sync32k_timer_init(void); extern void omap3_secure_sync32k_timer_init(void);
extern void omap3_gptimer_timer_init(void); extern void omap3_gptimer_timer_init(void);
extern void omap4_local_timer_init(void); extern void omap4_local_timer_init(void);
#ifdef CONFIG_CACHE_L2X0
int omap_l2_cache_init(void); int omap_l2_cache_init(void);
#else
static inline int omap_l2_cache_init(void)
{
return 0;
}
#endif
extern void omap5_realtime_timer_init(void); extern void omap5_realtime_timer_init(void);
void omap2420_init_early(void); void omap2420_init_early(void);

6
arch/arm/mach-prima2/Kconfig
View File

@ -1,4 +1,4 @@
config ARCH_SIRF menuconfig ARCH_SIRF
bool "CSR SiRF" if ARCH_MULTI_V7 bool "CSR SiRF" if ARCH_MULTI_V7
select ARCH_HAS_RESET_CONTROLLER select ARCH_HAS_RESET_CONTROLLER
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
@ -11,7 +11,7 @@ config ARCH_SIRF
if ARCH_SIRF if ARCH_SIRF
menu "CSR SiRF atlas6/primaII/Marco/Polo Specific Features" comment "CSR SiRF atlas6/primaII/Marco/Polo Specific Features"
config ARCH_ATLAS6 config ARCH_ATLAS6
bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform" bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform"
@ -37,8 +37,6 @@ config ARCH_MARCO
help help
Support for CSR SiRFSoC ARM Cortex A9 Platform Support for CSR SiRFSoC ARM Cortex A9 Platform
endmenu
config SIRF_IRQ config SIRF_IRQ
bool bool

6
arch/arm/mach-qcom/Kconfig
View File

@ -1,4 +1,4 @@
config ARCH_QCOM menuconfig ARCH_QCOM
bool "Qualcomm Support" if ARCH_MULTI_V7 bool "Qualcomm Support" if ARCH_MULTI_V7
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select ARM_GIC select ARM_GIC
@ -11,8 +11,6 @@ config ARCH_QCOM
if ARCH_QCOM if ARCH_QCOM
menu "Qualcomm SoC Selection"
config ARCH_MSM8X60 config ARCH_MSM8X60
bool "Enable support for MSM8X60" bool "Enable support for MSM8X60"
select CLKSRC_QCOM select CLKSRC_QCOM
@ -25,8 +23,6 @@ config ARCH_MSM8974
bool "Enable support for MSM8974" bool "Enable support for MSM8974"
select HAVE_ARM_ARCH_TIMER select HAVE_ARM_ARCH_TIMER
endmenu
config QCOM_SCM config QCOM_SCM
bool bool

2
arch/arm/mach-s3c24xx/Kconfig
View File

@ -117,7 +117,7 @@ config S3C24XX_SETUP_TS
Compile in platform device definition for Samsung TouchScreen. Compile in platform device definition for Samsung TouchScreen.
config S3C24XX_DMA config S3C24XX_DMA
bool "S3C2410 DMA support" bool "S3C2410 DMA support (deprecated)"
select S3C_DMA select S3C_DMA
help help
S3C2410 DMA support. This is needed for drivers like sound which S3C2410 DMA support. This is needed for drivers like sound which

4
arch/arm/mach-s3c64xx/Kconfig
View File

@ -18,9 +18,9 @@ config CPU_S3C6410
Enable S3C6410 CPU support Enable S3C6410 CPU support
config S3C64XX_PL080 config S3C64XX_PL080
bool "S3C64XX DMA using generic PL08x driver" def_bool DMADEVICES
select ARM_AMBA
select AMBA_PL08X select AMBA_PL08X
select SAMSUNG_DMADEV
config S3C64XX_SETUP_SDHCI config S3C64XX_SETUP_SDHCI
bool bool

6
arch/arm/mach-s5p64x0/Kconfig
View File

@ -9,16 +9,18 @@ if ARCH_S5P64X0
config CPU_S5P6440 config CPU_S5P6440
bool bool
select ARM_AMBA
select PL330_DMA if DMADEVICES
select S5P_SLEEP if PM select S5P_SLEEP if PM
select SAMSUNG_DMADEV
select SAMSUNG_WAKEMASK if PM select SAMSUNG_WAKEMASK if PM
help help
Enable S5P6440 CPU support Enable S5P6440 CPU support
config CPU_S5P6450 config CPU_S5P6450
bool bool
select ARM_AMBA
select PL330_DMA if DMADEVICES
select S5P_SLEEP if PM select S5P_SLEEP if PM
select SAMSUNG_DMADEV
select SAMSUNG_WAKEMASK if PM select SAMSUNG_WAKEMASK if PM
help help
Enable S5P6450 CPU support Enable S5P6450 CPU support

3
arch/arm/mach-s5pc100/Kconfig
View File

@ -9,8 +9,9 @@ if ARCH_S5PC100
config CPU_S5PC100 config CPU_S5PC100
bool bool
select ARM_AMBA
select PL330_DMA if DMADEVICES
select S5P_EXT_INT select S5P_EXT_INT
select SAMSUNG_DMADEV
help help
Enable S5PC100 CPU support Enable S5PC100 CPU support

3
arch/arm/mach-s5pv210/Kconfig
View File

@ -11,10 +11,11 @@ if ARCH_S5PV210
config CPU_S5PV210 config CPU_S5PV210
bool bool
select ARM_AMBA
select PL330_DMA if DMADEVICES
select S5P_EXT_INT select S5P_EXT_INT
select S5P_PM if PM select S5P_PM if PM
select S5P_SLEEP if PM select S5P_SLEEP if PM
select SAMSUNG_DMADEV
help help
Enable S5PV210 CPU support Enable S5PV210 CPU support

6
arch/arm/mach-shmobile/Kconfig
View File

@ -1,7 +1,7 @@
config ARCH_SHMOBILE config ARCH_SHMOBILE
bool bool
config ARCH_SHMOBILE_MULTI menuconfig ARCH_SHMOBILE_MULTI
bool "Renesas ARM SoCs" if ARCH_MULTI_V7 bool "Renesas ARM SoCs" if ARCH_MULTI_V7
depends on MMU depends on MMU
select ARCH_SHMOBILE select ARCH_SHMOBILE
@ -15,7 +15,7 @@ config ARCH_SHMOBILE_MULTI
if ARCH_SHMOBILE_MULTI if ARCH_SHMOBILE_MULTI
comment "Renesas ARM SoCs System Type" #comment "Renesas ARM SoCs System Type"
config ARCH_EMEV2 config ARCH_EMEV2
bool "Emma Mobile EV2" bool "Emma Mobile EV2"
@ -85,7 +85,6 @@ config ARCH_R8A73A4
select CPU_V7 select CPU_V7
select SH_CLK_CPG select SH_CLK_CPG
select RENESAS_IRQC select RENESAS_IRQC
select ARCH_HAS_CPUFREQ
select ARCH_HAS_OPP select ARCH_HAS_OPP
select SYS_SUPPORTS_SH_CMT select SYS_SUPPORTS_SH_CMT
select SYS_SUPPORTS_SH_TMU select SYS_SUPPORTS_SH_TMU
@ -264,7 +263,6 @@ config MACH_KOELSCH
config MACH_KZM9G config MACH_KZM9G
bool "KZM-A9-GT board" bool "KZM-A9-GT board"
depends on ARCH_SH73A0 depends on ARCH_SH73A0
select ARCH_HAS_CPUFREQ
select ARCH_HAS_OPP select ARCH_HAS_OPP
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select REGULATOR_FIXED_VOLTAGE if REGULATOR select REGULATOR_FIXED_VOLTAGE if REGULATOR

1
arch/arm/mach-spear/Kconfig
View File

@ -14,7 +14,6 @@ if PLAT_SPEAR
config ARCH_SPEAR13XX config ARCH_SPEAR13XX
bool "ST SPEAr13xx" bool "ST SPEAr13xx"
depends on ARCH_MULTI_V7 || PLAT_SPEAR_SINGLE depends on ARCH_MULTI_V7 || PLAT_SPEAR_SINGLE
select ARCH_HAS_CPUFREQ
select ARM_GIC select ARM_GIC
select GPIO_SPEAR_SPICS select GPIO_SPEAR_SPICS
select HAVE_ARM_SCU if SMP select HAVE_ARM_SCU if SMP

2
arch/arm/mach-sti/Kconfig
View File

@ -1,5 +1,5 @@
menuconfig ARCH_STI menuconfig ARCH_STI
bool "STMicroelectronics Consumer Electronics SOCs with Device Trees" if ARCH_MULTI_V7 bool "STMicroelectronics Consumer Electronics SOCs" if ARCH_MULTI_V7
select ARM_GIC select ARM_GIC
select ARM_GLOBAL_TIMER select ARM_GLOBAL_TIMER
select PINCTRL select PINCTRL

8
arch/arm/mach-tegra/Kconfig
View File

@ -1,6 +1,5 @@
config ARCH_TEGRA menuconfig ARCH_TEGRA
bool "NVIDIA Tegra" if ARCH_MULTI_V7 bool "NVIDIA Tegra" if ARCH_MULTI_V7
select ARCH_HAS_CPUFREQ
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select ARCH_SUPPORTS_TRUSTED_FOUNDATIONS select ARCH_SUPPORTS_TRUSTED_FOUNDATIONS
select ARM_GIC select ARM_GIC
@ -16,8 +15,7 @@ config ARCH_TEGRA
help help
This enables support for NVIDIA Tegra based systems. This enables support for NVIDIA Tegra based systems.
menu "NVIDIA Tegra options" if ARCH_TEGRA
depends on ARCH_TEGRA
config ARCH_TEGRA_2x_SOC config ARCH_TEGRA_2x_SOC
bool "Enable support for Tegra20 family" bool "Enable support for Tegra20 family"
@ -69,4 +67,4 @@ config TEGRA_AHB
which controls AHB bus master arbitration and some which controls AHB bus master arbitration and some
performance parameters(priority, prefech size). performance parameters(priority, prefech size).
endmenu endif

6
arch/arm/mach-u300/Kconfig
View File

@ -1,4 +1,4 @@
config ARCH_U300 menuconfig ARCH_U300
bool "ST-Ericsson U300 Series" if ARCH_MULTI_V5 bool "ST-Ericsson U300 Series" if ARCH_MULTI_V5
depends on MMU depends on MMU
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
@ -16,8 +16,6 @@ config ARCH_U300
if ARCH_U300 if ARCH_U300
menu "ST-Ericsson AB U300/U335 Platform"
config MACH_U300 config MACH_U300
depends on ARCH_U300 depends on ARCH_U300
bool "U300" bool "U300"
@ -43,6 +41,4 @@ config MACH_U300_SPIDUMMY
you don't need it. Selecting this will activate the you don't need it. Selecting this will activate the
SPI framework and ARM PL022 support. SPI framework and ARM PL022 support.
endmenu
endif endif

7
arch/arm/mach-ux500/Kconfig
View File

@ -1,9 +1,8 @@
config ARCH_U8500 menuconfig ARCH_U8500
bool "ST-Ericsson U8500 Series" if ARCH_MULTI_V7 bool "ST-Ericsson U8500 Series" if ARCH_MULTI_V7
depends on MMU depends on MMU
select AB8500_CORE select AB8500_CORE
select ABX500_CORE select ABX500_CORE
select ARCH_HAS_CPUFREQ
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select ARM_AMBA select ARM_AMBA
select ARM_ERRATA_754322 select ARM_ERRATA_754322
@ -34,8 +33,6 @@ config UX500_SOC_DB8500
select REGULATOR select REGULATOR
select REGULATOR_DB8500_PRCMU select REGULATOR_DB8500_PRCMU
menu "Ux500 target platform (boards)"
config MACH_MOP500 config MACH_MOP500
bool "U8500 Development platform, MOP500 versions" bool "U8500 Development platform, MOP500 versions"
select I2C select I2C
@ -68,8 +65,6 @@ config UX500_AUTO_PLATFORM
a working kernel. If everything else is disabled, this a working kernel. If everything else is disabled, this
automatically enables MACH_MOP500. automatically enables MACH_MOP500.
endmenu
config UX500_DEBUG_UART config UX500_DEBUG_UART
int "Ux500 UART to use for low-level debug" int "Ux500 UART to use for low-level debug"
default 2 default 2

8
arch/arm/mach-vexpress/Kconfig
View File

@ -1,4 +1,4 @@
config ARCH_VEXPRESS menuconfig ARCH_VEXPRESS
bool "ARM Ltd. Versatile Express family" if ARCH_MULTI_V7 bool "ARM Ltd. Versatile Express family" if ARCH_MULTI_V7
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select ARCH_SUPPORTS_BIG_ENDIAN select ARCH_SUPPORTS_BIG_ENDIAN
@ -37,8 +37,7 @@ config ARCH_VEXPRESS
platforms. The traditional (ATAGs) boot method is not usable on platforms. The traditional (ATAGs) boot method is not usable on
these boards with this option. these boards with this option.
menu "Versatile Express platform type" if ARCH_VEXPRESS
depends on ARCH_VEXPRESS
config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA
bool "Enable A5 and A9 only errata work-arounds" bool "Enable A5 and A9 only errata work-arounds"
@ -65,7 +64,6 @@ config ARCH_VEXPRESS_DCSCB
config ARCH_VEXPRESS_SPC config ARCH_VEXPRESS_SPC
bool "Versatile Express Serial Power Controller (SPC)" bool "Versatile Express Serial Power Controller (SPC)"
select ARCH_HAS_CPUFREQ
select ARCH_HAS_OPP select ARCH_HAS_OPP
select PM_OPP select PM_OPP
help help
@ -83,4 +81,4 @@ config ARCH_VEXPRESS_TC2_PM
Support for CPU and cluster power management on Versatile Express Support for CPU and cluster power management on Versatile Express
with a TC2 (A15x2 A7x3) big.LITTLE core tile. with a TC2 (A15x2 A7x3) big.LITTLE core tile.
endmenu endif

1
arch/arm/mach-vt8500/Kconfig
View File

@ -1,6 +1,5 @@
config ARCH_VT8500 config ARCH_VT8500
bool bool
select ARCH_HAS_CPUFREQ
select ARCH_REQUIRE_GPIOLIB select ARCH_REQUIRE_GPIOLIB
select CLKDEV_LOOKUP select CLKDEV_LOOKUP
select VT8500_TIMER select VT8500_TIMER

1
arch/arm/mach-zynq/Kconfig
View File

@ -1,6 +1,5 @@
config ARCH_ZYNQ config ARCH_ZYNQ
bool "Xilinx Zynq ARM Cortex A9 Platform" if ARCH_MULTI_V7 bool "Xilinx Zynq ARM Cortex A9 Platform" if ARCH_MULTI_V7
select ARCH_HAS_CPUFREQ
select ARCH_HAS_OPP select ARCH_HAS_OPP
select ARCH_SUPPORTS_BIG_ENDIAN select ARCH_SUPPORTS_BIG_ENDIAN
select ARM_AMBA select ARM_AMBA

28
arch/arm/plat-samsung/Kconfig
View File

@ -35,27 +35,15 @@ config SAMSUNG_PM
Base platform power management code for samsung code Base platform power management code for samsung code
if PLAT_SAMSUNG if PLAT_SAMSUNG
menu "Samsung Common options"
# boot configurations # boot configurations
comment "Boot options" comment "Boot options"
config S3C_BOOT_ERROR_RESET
bool "S3C Reboot on decompression error"
help
Say y here to use the watchdog to reset the system if the
kernel decompressor detects an error during decompression.
config S3C_BOOT_UART_FORCE_FIFO
bool "Force UART FIFO on during boot process"
default y
help
Say Y here to force the UART FIFOs on during the kernel
uncompressor
config S3C_LOWLEVEL_UART_PORT config S3C_LOWLEVEL_UART_PORT
int "S3C UART to use for low-level messages" int "S3C UART to use for low-level messages"
depends on ARCH_S3C64XX
default 0 default 0
help help
Choice of which UART port to use for the low-level messages, Choice of which UART port to use for the low-level messages,
@ -407,17 +395,16 @@ config SAMSUNG_PM_GPIO
Include legacy GPIO power management code for platforms not using Include legacy GPIO power management code for platforms not using
pinctrl-samsung driver. pinctrl-samsung driver.
endif
config SAMSUNG_DMADEV config SAMSUNG_DMADEV
bool bool "Use legacy Samsung DMA abstraction"
select ARM_AMBA depends on CPU_S5PV210 || CPU_S5PC100 || ARCH_S5P64X0 || ARCH_S3C64XX
select DMADEVICES select DMADEVICES
select PL330_DMA if (ARCH_EXYNOS5 || ARCH_EXYNOS4 || CPU_S5PV210 || CPU_S5PC100 || \ default y
CPU_S5P6450 || CPU_S5P6440)
help help
Use DMA device engine for PL330 DMAC. Use DMA device engine for PL330 DMAC.
endif
config S5P_DEV_MFC config S5P_DEV_MFC
bool bool
help help
@ -503,4 +490,5 @@ config DEBUG_S3C_UART
default "2" if DEBUG_S3C_UART2 default "2" if DEBUG_S3C_UART2
default "3" if DEBUG_S3C_UART3 default "3" if DEBUG_S3C_UART3
endmenu
endif endif

3
arch/arm64/Kconfig
View File

@ -1,8 +1,9 @@
config ARM64 config ARM64
def_bool y def_bool y
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
select ARCH_USE_CMPXCHG_LOCKREF select ARCH_HAS_OPP
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
select ARCH_USE_CMPXCHG_LOCKREF
select ARCH_WANT_OPTIONAL_GPIOLIB select ARCH_WANT_OPTIONAL_GPIOLIB
select ARCH_WANT_COMPAT_IPC_PARSE_VERSION select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
select ARCH_WANT_FRAME_POINTERS select ARCH_WANT_FRAME_POINTERS

4
arch/arm64/boot/dts/apm-mustang.dts
View File

@ -24,3 +24,7 @@
reg = < 0x1 0x00000000 0x0 0x80000000 >; /* Updated by bootloader */ reg = < 0x1 0x00000000 0x0 0x80000000 >; /* Updated by bootloader */
}; };
}; };
&serial0 {
status = "ok";
};

36
arch/arm64/boot/dts/apm-storm.dtsi
View File

@ -273,8 +273,9 @@
}; };
serial0: serial@1c020000 { serial0: serial@1c020000 {
status = "disabled";
device_type = "serial"; device_type = "serial";
compatible = "ns16550"; compatible = "ns16550a";
reg = <0 0x1c020000 0x0 0x1000>; reg = <0 0x1c020000 0x0 0x1000>;
reg-shift = <2>; reg-shift = <2>;
clock-frequency = <10000000>; /* Updated by bootloader */ clock-frequency = <10000000>; /* Updated by bootloader */
@ -282,6 +283,39 @@
interrupts = <0x0 0x4c 0x4>; interrupts = <0x0 0x4c 0x4>;
}; };
serial1: serial@1c021000 {
status = "disabled";
device_type = "serial";
compatible = "ns16550a";
reg = <0 0x1c021000 0x0 0x1000>;
reg-shift = <2>;
clock-frequency = <10000000>; /* Updated by bootloader */
interrupt-parent = <&gic>;
interrupts = <0x0 0x4d 0x4>;
};
serial2: serial@1c022000 {
status = "disabled";
device_type = "serial";
compatible = "ns16550a";
reg = <0 0x1c022000 0x0 0x1000>;
reg-shift = <2>;
clock-frequency = <10000000>; /* Updated by bootloader */
interrupt-parent = <&gic>;
interrupts = <0x0 0x4e 0x4>;
};
serial3: serial@1c023000 {
status = "disabled";
device_type = "serial";
compatible = "ns16550a";
reg = <0 0x1c023000 0x0 0x1000>;
reg-shift = <2>;
clock-frequency = <10000000>; /* Updated by bootloader */
interrupt-parent = <&gic>;
interrupts = <0x0 0x4f 0x4>;
};
phy1: phy@1f21a000 { phy1: phy@1f21a000 {
compatible = "apm,xgene-phy"; compatible = "apm,xgene-phy";
reg = <0x0 0x1f21a000 0x0 0x100>; reg = <0x0 0x1f21a000 0x0 0x100>;

15
arch/arm64/configs/defconfig
View File

@ -6,9 +6,18 @@ CONFIG_NO_HZ_IDLE=y
CONFIG_HIGH_RES_TIMERS=y CONFIG_HIGH_RES_TIMERS=y
CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_BSD_PROCESS_ACCT_V3=y
CONFIG_TASKSTATS=y
CONFIG_TASK_DELAY_ACCT=y
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y
CONFIG_IKCONFIG=y CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14 CONFIG_LOG_BUF_SHIFT=14
CONFIG_RESOURCE_COUNTERS=y
CONFIG_MEMCG=y
CONFIG_MEMCG_SWAP=y
CONFIG_MEMCG_KMEM=y
CONFIG_CGROUP_HUGETLB=y
# CONFIG_UTS_NS is not set # CONFIG_UTS_NS is not set
# CONFIG_IPC_NS is not set # CONFIG_IPC_NS is not set
# CONFIG_PID_NS is not set # CONFIG_PID_NS is not set
@ -27,6 +36,7 @@ CONFIG_ARCH_VEXPRESS=y
CONFIG_ARCH_XGENE=y CONFIG_ARCH_XGENE=y
CONFIG_SMP=y CONFIG_SMP=y
CONFIG_PREEMPT=y CONFIG_PREEMPT=y
CONFIG_KSM=y
CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE=y
CONFIG_CMA=y CONFIG_CMA=y
CONFIG_CMDLINE="console=ttyAMA0" CONFIG_CMDLINE="console=ttyAMA0"
@ -45,6 +55,7 @@ CONFIG_IP_PNP_BOOTP=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS=y
CONFIG_DMA_CMA=y CONFIG_DMA_CMA=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_VIRTIO_BLK=y CONFIG_VIRTIO_BLK=y
# CONFIG_SCSI_PROC_FS is not set # CONFIG_SCSI_PROC_FS is not set
CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SD=y
@ -53,6 +64,7 @@ CONFIG_ATA=y
CONFIG_PATA_PLATFORM=y CONFIG_PATA_PLATFORM=y
CONFIG_PATA_OF_PLATFORM=y CONFIG_PATA_OF_PLATFORM=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
CONFIG_TUN=y
CONFIG_SMC91X=y CONFIG_SMC91X=y
CONFIG_SMSC911X=y CONFIG_SMSC911X=y
# CONFIG_WLAN is not set # CONFIG_WLAN is not set
@ -85,6 +97,8 @@ CONFIG_EXT3_FS=y
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
# CONFIG_EXT3_FS_XATTR is not set # CONFIG_EXT3_FS_XATTR is not set
CONFIG_EXT4_FS=y CONFIG_EXT4_FS=y
CONFIG_FANOTIFY=y
CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
CONFIG_FUSE_FS=y CONFIG_FUSE_FS=y
CONFIG_CUSE=y CONFIG_CUSE=y
CONFIG_VFAT_FS=y CONFIG_VFAT_FS=y
@ -104,6 +118,7 @@ CONFIG_DEBUG_KERNEL=y
CONFIG_LOCKUP_DETECTOR=y CONFIG_LOCKUP_DETECTOR=y
# CONFIG_SCHED_DEBUG is not set # CONFIG_SCHED_DEBUG is not set
# CONFIG_FTRACE is not set # CONFIG_FTRACE is not set
CONFIG_SECURITY=y
CONFIG_CRYPTO_ANSI_CPRNG=y CONFIG_CRYPTO_ANSI_CPRNG=y
CONFIG_ARM64_CRYPTO=y CONFIG_ARM64_CRYPTO=y
CONFIG_CRYPTO_SHA1_ARM64_CE=y CONFIG_CRYPTO_SHA1_ARM64_CE=y

96
arch/arm64/crypto/ghash-ce-core.S
View File

@ -3,14 +3,6 @@
* *
* Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org> * Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org>
* *
* Based on arch/x86/crypto/ghash-pmullni-intel_asm.S
*
* Copyright (c) 2009 Intel Corp.
* Author: Huang Ying <ying.huang@intel.com>
* Vinodh Gopal
* Erdinc Ozturk
* Deniz Karakoyunlu
*
* This program is free software; you can redistribute it and/or modify it * This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published * under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation. * by the Free Software Foundation.
@ -19,13 +11,15 @@
#include <linux/linkage.h> #include <linux/linkage.h>
#include <asm/assembler.h> #include <asm/assembler.h>
DATA .req v0 SHASH .req v0
SHASH .req v1 SHASH2 .req v1
IN1 .req v2
T1 .req v2 T1 .req v2
T2 .req v3 T2 .req v3
T3 .req v4 MASK .req v4
VZR .req v5 XL .req v5
XM .req v6
XH .req v7
IN1 .req v7
.text .text
.arch armv8-a+crypto .arch armv8-a+crypto
@ -35,61 +29,51 @@
* struct ghash_key const *k, const char *head) * struct ghash_key const *k, const char *head)
*/ */
ENTRY(pmull_ghash_update) ENTRY(pmull_ghash_update)
ld1 {DATA.16b}, [x1]
ld1 {SHASH.16b}, [x3] ld1 {SHASH.16b}, [x3]
eor VZR.16b, VZR.16b, VZR.16b ld1 {XL.16b}, [x1]
movi MASK.16b, #0xe1
ext SHASH2.16b, SHASH.16b, SHASH.16b, #8
shl MASK.2d, MASK.2d, #57
eor SHASH2.16b, SHASH2.16b, SHASH.16b
/* do the head block first, if supplied */ /* do the head block first, if supplied */
cbz x4, 0f cbz x4, 0f
ld1 {IN1.2d}, [x4] ld1 {T1.2d}, [x4]
b 1f b 1f
0: ld1 {IN1.2d}, [x2], #16 0: ld1 {T1.2d}, [x2], #16
sub w0, w0, #1 sub w0, w0, #1
1: ext IN1.16b, IN1.16b, IN1.16b, #8
CPU_LE( rev64 IN1.16b, IN1.16b )
eor DATA.16b, DATA.16b, IN1.16b
/* multiply DATA by SHASH in GF(2^128) */ 1: /* multiply XL by SHASH in GF(2^128) */
ext T2.16b, DATA.16b, DATA.16b, #8 CPU_LE( rev64 T1.16b, T1.16b )
ext T3.16b, SHASH.16b, SHASH.16b, #8
eor T2.16b, T2.16b, DATA.16b
eor T3.16b, T3.16b, SHASH.16b
pmull2 T1.1q, SHASH.2d, DATA.2d // a1 * b1 ext T2.16b, XL.16b, XL.16b, #8
pmull DATA.1q, SHASH.1d, DATA.1d // a0 * b0 ext IN1.16b, T1.16b, T1.16b, #8
pmull T2.1q, T2.1d, T3.1d // (a1 + a0)(b1 + b0)
eor T2.16b, T2.16b, T1.16b // (a0 * b1) + (a1 * b0)
eor T2.16b, T2.16b, DATA.16b
ext T3.16b, VZR.16b, T2.16b, #8
ext T2.16b, T2.16b, VZR.16b, #8
eor DATA.16b, DATA.16b, T3.16b
eor T1.16b, T1.16b, T2.16b // <T1:DATA> is result of
// carry-less multiplication
/* first phase of the reduction */
shl T3.2d, DATA.2d, #1
eor T3.16b, T3.16b, DATA.16b
shl T3.2d, T3.2d, #5
eor T3.16b, T3.16b, DATA.16b
shl T3.2d, T3.2d, #57
ext T2.16b, VZR.16b, T3.16b, #8
ext T3.16b, T3.16b, VZR.16b, #8
eor DATA.16b, DATA.16b, T2.16b
eor T1.16b, T1.16b, T3.16b
/* second phase of the reduction */
ushr T2.2d, DATA.2d, #5
eor T2.16b, T2.16b, DATA.16b
ushr T2.2d, T2.2d, #1
eor T2.16b, T2.16b, DATA.16b
ushr T2.2d, T2.2d, #1
eor T1.16b, T1.16b, T2.16b eor T1.16b, T1.16b, T2.16b
eor DATA.16b, DATA.16b, T1.16b eor XL.16b, XL.16b, IN1.16b
pmull2 XH.1q, SHASH.2d, XL.2d // a1 * b1
eor T1.16b, T1.16b, XL.16b
pmull XL.1q, SHASH.1d, XL.1d // a0 * b0
pmull XM.1q, SHASH2.1d, T1.1d // (a1 + a0)(b1 + b0)
ext T1.16b, XL.16b, XH.16b, #8
eor T2.16b, XL.16b, XH.16b
eor XM.16b, XM.16b, T1.16b
eor XM.16b, XM.16b, T2.16b
pmull T2.1q, XL.1d, MASK.1d
mov XH.d[0], XM.d[1]
mov XM.d[1], XL.d[0]
eor XL.16b, XM.16b, T2.16b
ext T2.16b, XL.16b, XL.16b, #8
pmull XL.1q, XL.1d, MASK.1d
eor T2.16b, T2.16b, XH.16b
eor XL.16b, XL.16b, T2.16b
cbnz w0, 0b cbnz w0, 0b
st1 {DATA.16b}, [x1] st1 {XL.16b}, [x1]
ret ret
ENDPROC(pmull_ghash_update) ENDPROC(pmull_ghash_update)

5
arch/arm64/crypto/ghash-ce-glue.c
View File

@ -67,11 +67,12 @@ static int ghash_update(struct shash_desc *desc, const u8 *src,
blocks = len / GHASH_BLOCK_SIZE; blocks = len / GHASH_BLOCK_SIZE;
len %= GHASH_BLOCK_SIZE; len %= GHASH_BLOCK_SIZE;
kernel_neon_begin_partial(6); kernel_neon_begin_partial(8);
pmull_ghash_update(blocks, ctx->digest, src, key, pmull_ghash_update(blocks, ctx->digest, src, key,
partial ? ctx->buf : NULL); partial ? ctx->buf : NULL);
kernel_neon_end(); kernel_neon_end();
src += blocks * GHASH_BLOCK_SIZE; src += blocks * GHASH_BLOCK_SIZE;
partial = 0;
} }
if (len) if (len)
memcpy(ctx->buf + partial, src, len); memcpy(ctx->buf + partial, src, len);
@ -88,7 +89,7 @@ static int ghash_final(struct shash_desc *desc, u8 *dst)
memset(ctx->buf + partial, 0, GHASH_BLOCK_SIZE - partial); memset(ctx->buf + partial, 0, GHASH_BLOCK_SIZE - partial);
kernel_neon_begin_partial(6); kernel_neon_begin_partial(8);
pmull_ghash_update(1, ctx->digest, ctx->buf, key, NULL); pmull_ghash_update(1, ctx->digest, ctx->buf, key, NULL);
kernel_neon_end(); kernel_neon_end();
} }

1
arch/arm64/include/asm/Kbuild
View File

@ -30,7 +30,6 @@ generic-y += msgbuf.h
generic-y += mutex.h generic-y += mutex.h
generic-y += pci.h generic-y += pci.h
generic-y += poll.h generic-y += poll.h
generic-y += posix_types.h
generic-y += preempt.h generic-y += preempt.h
generic-y += resource.h generic-y += resource.h
generic-y += rwsem.h generic-y += rwsem.h

2
arch/arm64/include/asm/dma-mapping.h
View File

@ -26,8 +26,6 @@
#include <xen/xen.h> #include <xen/xen.h>
#include <asm/xen/hypervisor.h> #include <asm/xen/hypervisor.h>
#define ARCH_HAS_DMA_GET_REQUIRED_MASK
#define DMA_ERROR_CODE (~(dma_addr_t)0) #define DMA_ERROR_CODE (~(dma_addr_t)0)
extern struct dma_map_ops *dma_ops; extern struct dma_map_ops *dma_ops;
extern struct dma_map_ops coherent_swiotlb_dma_ops; extern struct dma_map_ops coherent_swiotlb_dma_ops;

2
arch/arm64/include/asm/pgtable.h
View File

@ -246,7 +246,7 @@ static inline pmd_t pte_pmd(pte_t pte)
#define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd))) #define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))
#define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd))) #define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd)))
#define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd))) #define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
#define pmd_mknotpresent(pmd) (__pmd(pmd_val(pmd) &= ~PMD_TYPE_MASK)) #define pmd_mknotpresent(pmd) (__pmd(pmd_val(pmd) & ~PMD_TYPE_MASK))
#define __HAVE_ARCH_PMD_WRITE #define __HAVE_ARCH_PMD_WRITE
#define pmd_write(pmd) pte_write(pmd_pte(pmd)) #define pmd_write(pmd) pte_write(pmd_pte(pmd))

10
arch/arm64/include/uapi/asm/posix_types.h Normal file
View File

@ -0,0 +1,10 @@
#ifndef __ASM_POSIX_TYPES_H
#define __ASM_POSIX_TYPES_H
typedef unsigned short __kernel_old_uid_t;
typedef unsigned short __kernel_old_gid_t;
#define __kernel_old_uid_t __kernel_old_uid_t
#include <asm-generic/posix_types.h>
#endif /* __ASM_POSIX_TYPES_H */

2
arch/arm64/include/uapi/asm/sigcontext.h
View File

@ -58,7 +58,7 @@ struct fpsimd_context {
struct esr_context { struct esr_context {
struct _aarch64_ctx head; struct _aarch64_ctx head;
u64 esr; __u64 esr;
}; };
#endif /* _UAPI__ASM_SIGCONTEXT_H */ #endif /* _UAPI__ASM_SIGCONTEXT_H */

2
arch/arm64/kernel/entry-ftrace.S
View File

@ -205,7 +205,7 @@ ENDPROC(ftrace_graph_caller)
* *
* Run ftrace_return_to_handler() before going back to parent. * Run ftrace_return_to_handler() before going back to parent.
* @fp is checked against the value passed by ftrace_graph_caller() * @fp is checked against the value passed by ftrace_graph_caller()
* only when CONFIG_FUNCTION_GRAPH_FP_TEST is enabled. * only when CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST is enabled.
*/ */
ENTRY(return_to_handler) ENTRY(return_to_handler)
str x0, [sp, #-16]! str x0, [sp, #-16]!

1
arch/arm64/kernel/entry.S
View File

@ -279,7 +279,6 @@ el1_sp_pc:
*/ */
mrs x0, far_el1 mrs x0, far_el1
enable_dbg enable_dbg
mov x1, x25
mov x2, sp mov x2, sp
b do_sp_pc_abort b do_sp_pc_abort
el1_undef: el1_undef:

14
arch/arm64/kernel/ptrace.c
View File

@ -655,12 +655,17 @@ static int compat_gpr_get(struct task_struct *target,
reg = task_pt_regs(target)->regs[idx]; reg = task_pt_regs(target)->regs[idx];
} }
if (kbuf) {
memcpy(kbuf, &reg, sizeof(reg));
kbuf += sizeof(reg);
} else {
ret = copy_to_user(ubuf, &reg, sizeof(reg)); ret = copy_to_user(ubuf, &reg, sizeof(reg));
if (ret) if (ret)
break; break;
ubuf += sizeof(reg); ubuf += sizeof(reg);
} }
}
return ret; return ret;
} }
@ -689,11 +694,16 @@ static int compat_gpr_set(struct task_struct *target,
unsigned int idx = start + i; unsigned int idx = start + i;
compat_ulong_t reg; compat_ulong_t reg;
if (kbuf) {
memcpy(&reg, kbuf, sizeof(reg));
kbuf += sizeof(reg);
} else {
ret = copy_from_user(&reg, ubuf, sizeof(reg)); ret = copy_from_user(&reg, ubuf, sizeof(reg));
if (ret) if (ret)
return ret; return ret;
ubuf += sizeof(reg); ubuf += sizeof(reg);
}
switch (idx) { switch (idx) {
case 15: case 15:
@ -827,6 +837,7 @@ static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
compat_ulong_t val) compat_ulong_t val)
{ {
int ret; int ret;
mm_segment_t old_fs = get_fs();
if (off & 3 || off >= COMPAT_USER_SZ) if (off & 3 || off >= COMPAT_USER_SZ)
return -EIO; return -EIO;
@ -834,10 +845,13 @@ static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
if (off >= sizeof(compat_elf_gregset_t)) if (off >= sizeof(compat_elf_gregset_t))
return 0; return 0;
set_fs(KERNEL_DS);
ret = copy_regset_from_user(tsk, &user_aarch32_view, ret = copy_regset_from_user(tsk, &user_aarch32_view,
REGSET_COMPAT_GPR, off, REGSET_COMPAT_GPR, off,
sizeof(compat_ulong_t), sizeof(compat_ulong_t),
&val); &val);
set_fs(old_fs);
return ret; return ret;
} }

10
arch/arm64/mm/init.c
View File

@ -71,7 +71,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
/* 4GB maximum for 32-bit only capable devices */ /* 4GB maximum for 32-bit only capable devices */
if (IS_ENABLED(CONFIG_ZONE_DMA)) { if (IS_ENABLED(CONFIG_ZONE_DMA)) {
unsigned long max_dma_phys = unsigned long max_dma_phys =
(unsigned long)dma_to_phys(NULL, DMA_BIT_MASK(32) + 1); (unsigned long)(dma_to_phys(NULL, DMA_BIT_MASK(32)) + 1);
max_dma = max(min, min(max, max_dma_phys >> PAGE_SHIFT)); max_dma = max(min, min(max, max_dma_phys >> PAGE_SHIFT));
zone_size[ZONE_DMA] = max_dma - min; zone_size[ZONE_DMA] = max_dma - min;
} }
@ -126,6 +126,8 @@ static void arm64_memory_present(void)
void __init arm64_memblock_init(void) void __init arm64_memblock_init(void)
{ {
phys_addr_t dma_phys_limit = 0;
/* Register the kernel text, kernel data and initrd with memblock */ /* Register the kernel text, kernel data and initrd with memblock */
memblock_reserve(__pa(_text), _end - _text); memblock_reserve(__pa(_text), _end - _text);
#ifdef CONFIG_BLK_DEV_INITRD #ifdef CONFIG_BLK_DEV_INITRD
@ -141,7 +143,11 @@ void __init arm64_memblock_init(void)
memblock_reserve(__pa(idmap_pg_dir), IDMAP_DIR_SIZE); memblock_reserve(__pa(idmap_pg_dir), IDMAP_DIR_SIZE);
early_init_fdt_scan_reserved_mem(); early_init_fdt_scan_reserved_mem();
dma_contiguous_reserve(0);
/* 4GB maximum for 32-bit only capable devices */
if (IS_ENABLED(CONFIG_ZONE_DMA))
dma_phys_limit = dma_to_phys(NULL, DMA_BIT_MASK(32)) + 1;
dma_contiguous_reserve(dma_phys_limit);
memblock_allow_resize(); memblock_allow_resize();
memblock_dump_all(); memblock_dump_all();

64
arch/ia64/hp/common/sba_iommu.c
View File

@ -242,7 +242,7 @@ struct ioc {
struct pci_dev *sac_only_dev; struct pci_dev *sac_only_dev;
}; };
static struct ioc *ioc_list; static struct ioc *ioc_list, *ioc_found;
static int reserve_sba_gart = 1; static int reserve_sba_gart = 1;
static SBA_INLINE void sba_mark_invalid(struct ioc *, dma_addr_t, size_t); static SBA_INLINE void sba_mark_invalid(struct ioc *, dma_addr_t, size_t);
@ -1809,20 +1809,13 @@ static struct ioc_iommu ioc_iommu_info[] __initdata = {
{ SX2000_IOC_ID, "sx2000", NULL }, { SX2000_IOC_ID, "sx2000", NULL },
}; };
static struct ioc * static void ioc_init(unsigned long hpa, struct ioc *ioc)
ioc_init(unsigned long hpa, void *handle)
{ {
struct ioc *ioc;
struct ioc_iommu *info; struct ioc_iommu *info;
ioc = kzalloc(sizeof(*ioc), GFP_KERNEL);
if (!ioc)
return NULL;
ioc->next = ioc_list; ioc->next = ioc_list;
ioc_list = ioc; ioc_list = ioc;
ioc->handle = handle;
ioc->ioc_hpa = ioremap(hpa, 0x1000); ioc->ioc_hpa = ioremap(hpa, 0x1000);
ioc->func_id = READ_REG(ioc->ioc_hpa + IOC_FUNC_ID); ioc->func_id = READ_REG(ioc->ioc_hpa + IOC_FUNC_ID);
@ -1863,8 +1856,6 @@ ioc_init(unsigned long hpa, void *handle)
"%s %d.%d HPA 0x%lx IOVA space %dMb at 0x%lx\n", "%s %d.%d HPA 0x%lx IOVA space %dMb at 0x%lx\n",
ioc->name, (ioc->rev >> 4) & 0xF, ioc->rev & 0xF, ioc->name, (ioc->rev >> 4) & 0xF, ioc->rev & 0xF,
hpa, ioc->iov_size >> 20, ioc->ibase); hpa, ioc->iov_size >> 20, ioc->ibase);
return ioc;
} }
@ -2031,22 +2022,21 @@ sba_map_ioc_to_node(struct ioc *ioc, acpi_handle handle)
#endif #endif
} }
static int static void acpi_sba_ioc_add(struct ioc *ioc)
acpi_sba_ioc_add(struct acpi_device *device,
const struct acpi_device_id *not_used)
{ {
struct ioc *ioc; acpi_handle handle = ioc->handle;
acpi_status status; acpi_status status;
u64 hpa, length; u64 hpa, length;
struct acpi_device_info *adi; struct acpi_device_info *adi;
status = hp_acpi_csr_space(device->handle, &hpa, &length); ioc_found = ioc->next;
status = hp_acpi_csr_space(handle, &hpa, &length);
if (ACPI_FAILURE(status)) if (ACPI_FAILURE(status))
return 1; goto err;
status = acpi_get_object_info(device->handle, &adi); status = acpi_get_object_info(handle, &adi);
if (ACPI_FAILURE(status)) if (ACPI_FAILURE(status))
return 1; goto err;
/* /*
* For HWP0001, only SBA appears in ACPI namespace. It encloses the PCI * For HWP0001, only SBA appears in ACPI namespace. It encloses the PCI
@ -2067,13 +2057,13 @@ acpi_sba_ioc_add(struct acpi_device *device,
if (!iovp_shift) if (!iovp_shift)
iovp_shift = 12; iovp_shift = 12;
ioc = ioc_init(hpa, device->handle); ioc_init(hpa, ioc);
if (!ioc)
return 1;
/* setup NUMA node association */ /* setup NUMA node association */
sba_map_ioc_to_node(ioc, device->handle); sba_map_ioc_to_node(ioc, handle);
return 0; return;
err:
kfree(ioc);
} }
static const struct acpi_device_id hp_ioc_iommu_device_ids[] = { static const struct acpi_device_id hp_ioc_iommu_device_ids[] = {
@ -2081,9 +2071,26 @@ static const struct acpi_device_id hp_ioc_iommu_device_ids[] = {
{"HWP0004", 0}, {"HWP0004", 0},
{"", 0}, {"", 0},
}; };
static int acpi_sba_ioc_attach(struct acpi_device *device,
const struct acpi_device_id *not_used)
{
struct ioc *ioc;
ioc = kzalloc(sizeof(*ioc), GFP_KERNEL);
if (!ioc)
return -ENOMEM;
ioc->next = ioc_found;
ioc_found = ioc;
ioc->handle = device->handle;
return 1;
}
static struct acpi_scan_handler acpi_sba_ioc_handler = { static struct acpi_scan_handler acpi_sba_ioc_handler = {
.ids = hp_ioc_iommu_device_ids, .ids = hp_ioc_iommu_device_ids,
.attach = acpi_sba_ioc_add, .attach = acpi_sba_ioc_attach,
}; };
static int __init acpi_sba_ioc_init_acpi(void) static int __init acpi_sba_ioc_init_acpi(void)
@ -2118,9 +2125,12 @@ sba_init(void)
#endif #endif
/* /*
* ioc_list should be populated by the acpi_sba_ioc_handler's .attach() * ioc_found should be populated by the acpi_sba_ioc_handler's .attach()
* routine, but that only happens if acpi_scan_init() has already run. * routine, but that only happens if acpi_scan_init() has already run.
*/ */
while (ioc_found)
acpi_sba_ioc_add(ioc_found);
if (!ioc_list) { if (!ioc_list) {
#ifdef CONFIG_IA64_GENERIC #ifdef CONFIG_IA64_GENERIC
/* /*

5
arch/s390/configs/default_defconfig
View File

@ -45,7 +45,8 @@ CONFIG_SOLARIS_X86_PARTITION=y
CONFIG_UNIXWARE_DISKLABEL=y CONFIG_UNIXWARE_DISKLABEL=y
CONFIG_CFQ_GROUP_IOSCHED=y CONFIG_CFQ_GROUP_IOSCHED=y
CONFIG_DEFAULT_DEADLINE=y CONFIG_DEFAULT_DEADLINE=y
CONFIG_MARCH_Z9_109=y CONFIG_MARCH_Z196=y
CONFIG_TUNE_ZEC12=y
CONFIG_NR_CPUS=256 CONFIG_NR_CPUS=256
CONFIG_PREEMPT=y CONFIG_PREEMPT=y
CONFIG_HZ_100=y CONFIG_HZ_100=y
@ -240,7 +241,6 @@ CONFIG_IP_VS_PE_SIP=m
CONFIG_NF_CONNTRACK_IPV4=m CONFIG_NF_CONNTRACK_IPV4=m
# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set # CONFIG_NF_CONNTRACK_PROC_COMPAT is not set
CONFIG_NF_TABLES_IPV4=m CONFIG_NF_TABLES_IPV4=m
CONFIG_NFT_REJECT_IPV4=m
CONFIG_NFT_CHAIN_ROUTE_IPV4=m CONFIG_NFT_CHAIN_ROUTE_IPV4=m
CONFIG_NFT_CHAIN_NAT_IPV4=m CONFIG_NFT_CHAIN_NAT_IPV4=m
CONFIG_NF_TABLES_ARP=m CONFIG_NF_TABLES_ARP=m
@ -456,6 +456,7 @@ CONFIG_TN3270_FS=y
CONFIG_WATCHDOG=y CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y CONFIG_WATCHDOG_NOWAYOUT=y
CONFIG_SOFT_WATCHDOG=m CONFIG_SOFT_WATCHDOG=m
CONFIG_DIAG288_WATCHDOG=m
# CONFIG_HID is not set # CONFIG_HID is not set
# CONFIG_USB_SUPPORT is not set # CONFIG_USB_SUPPORT is not set
CONFIG_INFINIBAND=m CONFIG_INFINIBAND=m

5
arch/s390/configs/gcov_defconfig
View File

@ -45,7 +45,8 @@ CONFIG_SOLARIS_X86_PARTITION=y
CONFIG_UNIXWARE_DISKLABEL=y CONFIG_UNIXWARE_DISKLABEL=y
CONFIG_CFQ_GROUP_IOSCHED=y CONFIG_CFQ_GROUP_IOSCHED=y
CONFIG_DEFAULT_DEADLINE=y CONFIG_DEFAULT_DEADLINE=y
CONFIG_MARCH_Z9_109=y CONFIG_MARCH_Z196=y
CONFIG_TUNE_ZEC12=y
CONFIG_NR_CPUS=256 CONFIG_NR_CPUS=256
CONFIG_HZ_100=y CONFIG_HZ_100=y
CONFIG_MEMORY_HOTPLUG=y CONFIG_MEMORY_HOTPLUG=y
@ -238,7 +239,6 @@ CONFIG_IP_VS_PE_SIP=m
CONFIG_NF_CONNTRACK_IPV4=m CONFIG_NF_CONNTRACK_IPV4=m
# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set # CONFIG_NF_CONNTRACK_PROC_COMPAT is not set
CONFIG_NF_TABLES_IPV4=m CONFIG_NF_TABLES_IPV4=m
CONFIG_NFT_REJECT_IPV4=m
CONFIG_NFT_CHAIN_ROUTE_IPV4=m CONFIG_NFT_CHAIN_ROUTE_IPV4=m
CONFIG_NFT_CHAIN_NAT_IPV4=m CONFIG_NFT_CHAIN_NAT_IPV4=m
CONFIG_NF_TABLES_ARP=m CONFIG_NF_TABLES_ARP=m
@ -453,6 +453,7 @@ CONFIG_TN3270_FS=y
CONFIG_WATCHDOG=y CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y CONFIG_WATCHDOG_NOWAYOUT=y
CONFIG_SOFT_WATCHDOG=m CONFIG_SOFT_WATCHDOG=m
CONFIG_DIAG288_WATCHDOG=m
# CONFIG_HID is not set # CONFIG_HID is not set
# CONFIG_USB_SUPPORT is not set # CONFIG_USB_SUPPORT is not set
CONFIG_INFINIBAND=m CONFIG_INFINIBAND=m

5
arch/s390/configs/performance_defconfig
View File

@ -43,7 +43,8 @@ CONFIG_SOLARIS_X86_PARTITION=y
CONFIG_UNIXWARE_DISKLABEL=y CONFIG_UNIXWARE_DISKLABEL=y
CONFIG_CFQ_GROUP_IOSCHED=y CONFIG_CFQ_GROUP_IOSCHED=y
CONFIG_DEFAULT_DEADLINE=y CONFIG_DEFAULT_DEADLINE=y
CONFIG_MARCH_Z9_109=y CONFIG_MARCH_Z196=y
CONFIG_TUNE_ZEC12=y
CONFIG_NR_CPUS=256 CONFIG_NR_CPUS=256
CONFIG_HZ_100=y CONFIG_HZ_100=y
CONFIG_MEMORY_HOTPLUG=y CONFIG_MEMORY_HOTPLUG=y
@ -236,7 +237,6 @@ CONFIG_IP_VS_PE_SIP=m
CONFIG_NF_CONNTRACK_IPV4=m CONFIG_NF_CONNTRACK_IPV4=m
# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set # CONFIG_NF_CONNTRACK_PROC_COMPAT is not set
CONFIG_NF_TABLES_IPV4=m CONFIG_NF_TABLES_IPV4=m
CONFIG_NFT_REJECT_IPV4=m
CONFIG_NFT_CHAIN_ROUTE_IPV4=m CONFIG_NFT_CHAIN_ROUTE_IPV4=m
CONFIG_NFT_CHAIN_NAT_IPV4=m CONFIG_NFT_CHAIN_NAT_IPV4=m
CONFIG_NF_TABLES_ARP=m CONFIG_NF_TABLES_ARP=m
@ -451,6 +451,7 @@ CONFIG_TN3270_FS=y
CONFIG_WATCHDOG=y CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y CONFIG_WATCHDOG_NOWAYOUT=y
CONFIG_SOFT_WATCHDOG=m CONFIG_SOFT_WATCHDOG=m
CONFIG_DIAG288_WATCHDOG=m
# CONFIG_HID is not set # CONFIG_HID is not set
# CONFIG_USB_SUPPORT is not set # CONFIG_USB_SUPPORT is not set
CONFIG_INFINIBAND=m CONFIG_INFINIBAND=m

3
arch/s390/configs/zfcpdump_defconfig
View File

@ -8,7 +8,8 @@ CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_PARTITION_ADVANCED=y CONFIG_PARTITION_ADVANCED=y
CONFIG_IBM_PARTITION=y CONFIG_IBM_PARTITION=y
CONFIG_DEFAULT_DEADLINE=y CONFIG_DEFAULT_DEADLINE=y
CONFIG_MARCH_Z9_109=y CONFIG_MARCH_Z196=y
CONFIG_TUNE_ZEC12=y
# CONFIG_COMPAT is not set # CONFIG_COMPAT is not set
CONFIG_NR_CPUS=2 CONFIG_NR_CPUS=2
# CONFIG_HOTPLUG_CPU is not set # CONFIG_HOTPLUG_CPU is not set

8
arch/s390/defconfig
View File

@ -135,8 +135,8 @@ CONFIG_PROVE_LOCKING=y
CONFIG_LOCK_STAT=y CONFIG_LOCK_STAT=y
CONFIG_DEBUG_LOCKDEP=y CONFIG_DEBUG_LOCKDEP=y
CONFIG_DEBUG_ATOMIC_SLEEP=y CONFIG_DEBUG_ATOMIC_SLEEP=y
CONFIG_DEBUG_WRITECOUNT=y
CONFIG_DEBUG_LIST=y CONFIG_DEBUG_LIST=y
CONFIG_DEBUG_PI_LIST=y
CONFIG_DEBUG_SG=y CONFIG_DEBUG_SG=y
CONFIG_DEBUG_NOTIFIERS=y CONFIG_DEBUG_NOTIFIERS=y
CONFIG_PROVE_RCU=y CONFIG_PROVE_RCU=y
@ -199,4 +199,10 @@ CONFIG_CRYPTO_SHA512_S390=m
CONFIG_CRYPTO_DES_S390=m CONFIG_CRYPTO_DES_S390=m
CONFIG_CRYPTO_AES_S390=m CONFIG_CRYPTO_AES_S390=m
CONFIG_CRC7=m CONFIG_CRC7=m
# CONFIG_XZ_DEC_X86 is not set
# CONFIG_XZ_DEC_POWERPC is not set
# CONFIG_XZ_DEC_IA64 is not set
# CONFIG_XZ_DEC_ARM is not set
# CONFIG_XZ_DEC_ARMTHUMB is not set
# CONFIG_XZ_DEC_SPARC is not set
CONFIG_CMM=m CONFIG_CMM=m

17
arch/s390/include/asm/mmu_context.h
View File

@ -33,10 +33,9 @@ static inline int init_new_context(struct task_struct *tsk,
static inline void set_user_asce(struct mm_struct *mm) static inline void set_user_asce(struct mm_struct *mm)
{ {
pgd_t *pgd = mm->pgd; S390_lowcore.user_asce = mm->context.asce_bits | __pa(mm->pgd);
if (current->thread.mm_segment.ar4)
S390_lowcore.user_asce = mm->context.asce_bits | __pa(pgd); __ctl_load(S390_lowcore.user_asce, 7, 7);
set_fs(current->thread.mm_segment);
set_cpu_flag(CIF_ASCE); set_cpu_flag(CIF_ASCE);
} }
@ -70,12 +69,11 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
/* Clear old ASCE by loading the kernel ASCE. */ /* Clear old ASCE by loading the kernel ASCE. */
__ctl_load(S390_lowcore.kernel_asce, 1, 1); __ctl_load(S390_lowcore.kernel_asce, 1, 1);
__ctl_load(S390_lowcore.kernel_asce, 7, 7); __ctl_load(S390_lowcore.kernel_asce, 7, 7);
/* Delay loading of the new ASCE to control registers CR1 & CR7 */
set_cpu_flag(CIF_ASCE);
atomic_inc(&next->context.attach_count); atomic_inc(&next->context.attach_count);
atomic_dec(&prev->context.attach_count); atomic_dec(&prev->context.attach_count);
if (MACHINE_HAS_TLB_LC) if (MACHINE_HAS_TLB_LC)
cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask); cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
S390_lowcore.user_asce = next->context.asce_bits | __pa(next->pgd);
} }
#define finish_arch_post_lock_switch finish_arch_post_lock_switch #define finish_arch_post_lock_switch finish_arch_post_lock_switch
@ -84,17 +82,18 @@ static inline void finish_arch_post_lock_switch(void)
struct task_struct *tsk = current; struct task_struct *tsk = current;
struct mm_struct *mm = tsk->mm; struct mm_struct *mm = tsk->mm;
if (!mm) load_kernel_asce();
return; if (mm) {
preempt_disable(); preempt_disable();
while (atomic_read(&mm->context.attach_count) >> 16) while (atomic_read(&mm->context.attach_count) >> 16)
cpu_relax(); cpu_relax();
cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm)); cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
set_user_asce(mm);
if (mm->context.flush_mm) if (mm->context.flush_mm)
__tlb_flush_mm(mm); __tlb_flush_mm(mm);
preempt_enable(); preempt_enable();
}
set_fs(current->thread.mm_segment);
} }
#define enter_lazy_tlb(mm,tsk) do { } while (0) #define enter_lazy_tlb(mm,tsk) do { } while (0)

4
arch/s390/include/asm/switch_to.h
View File

@ -134,8 +134,4 @@ static inline void restore_access_regs(unsigned int *acrs)
prev = __switch_to(prev,next); \ prev = __switch_to(prev,next); \
} while (0) } while (0)
#define finish_arch_switch(prev) do { \
set_fs(current->thread.mm_segment); \
} while (0)
#endif /* __ASM_SWITCH_TO_H */ #endif /* __ASM_SWITCH_TO_H */

8
arch/s390/include/uapi/asm/ucontext.h
View File

@ -16,7 +16,9 @@ struct ucontext_extended {
struct ucontext *uc_link; struct ucontext *uc_link;
stack_t uc_stack; stack_t uc_stack;
_sigregs uc_mcontext; _sigregs uc_mcontext;
unsigned long uc_sigmask[2]; sigset_t uc_sigmask;
/* Allow for uc_sigmask growth. Glibc uses a 1024-bit sigset_t. */
unsigned char __unused[128 - sizeof(sigset_t)];
unsigned long uc_gprs_high[16]; unsigned long uc_gprs_high[16];
}; };
@ -27,7 +29,9 @@ struct ucontext {
struct ucontext *uc_link; struct ucontext *uc_link;
stack_t uc_stack; stack_t uc_stack;
_sigregs uc_mcontext; _sigregs uc_mcontext;
sigset_t uc_sigmask; /* mask last for extensibility */ sigset_t uc_sigmask;
/* Allow for uc_sigmask growth. Glibc uses a 1024-bit sigset_t. */
unsigned char __unused[128 - sizeof(sigset_t)];
}; };
#endif /* !_ASM_S390_UCONTEXT_H */ #endif /* !_ASM_S390_UCONTEXT_H */

4
arch/s390/kernel/compat_linux.h
View File

@ -69,7 +69,9 @@ struct ucontext32 {
__u32 uc_link; /* pointer */ __u32 uc_link; /* pointer */
compat_stack_t uc_stack; compat_stack_t uc_stack;
_sigregs32 uc_mcontext; _sigregs32 uc_mcontext;
compat_sigset_t uc_sigmask; /* mask last for extensibility */ compat_sigset_t uc_sigmask;
/* Allow for uc_sigmask growth. Glibc uses a 1024-bit sigset_t. */
unsigned char __unused[128 - sizeof(compat_sigset_t)];
}; };
struct stat64_emu31; struct stat64_emu31;

6
arch/sparc/crypto/aes_glue.c
View File

@ -124,7 +124,7 @@ extern void aes_sparc64_ctr_crypt_256(const u64 *key, const u64 *input,
u64 *output, unsigned int len, u64 *output, unsigned int len,
u64 *iv); u64 *iv);
struct aes_ops aes128_ops = { static struct aes_ops aes128_ops = {
.encrypt = aes_sparc64_encrypt_128, .encrypt = aes_sparc64_encrypt_128,
.decrypt = aes_sparc64_decrypt_128, .decrypt = aes_sparc64_decrypt_128,
.load_encrypt_keys = aes_sparc64_load_encrypt_keys_128, .load_encrypt_keys = aes_sparc64_load_encrypt_keys_128,
@ -136,7 +136,7 @@ struct aes_ops aes128_ops = {
.ctr_crypt = aes_sparc64_ctr_crypt_128, .ctr_crypt = aes_sparc64_ctr_crypt_128,
}; };
struct aes_ops aes192_ops = { static struct aes_ops aes192_ops = {
.encrypt = aes_sparc64_encrypt_192, .encrypt = aes_sparc64_encrypt_192,
.decrypt = aes_sparc64_decrypt_192, .decrypt = aes_sparc64_decrypt_192,
.load_encrypt_keys = aes_sparc64_load_encrypt_keys_192, .load_encrypt_keys = aes_sparc64_load_encrypt_keys_192,
@ -148,7 +148,7 @@ struct aes_ops aes192_ops = {
.ctr_crypt = aes_sparc64_ctr_crypt_192, .ctr_crypt = aes_sparc64_ctr_crypt_192,
}; };
struct aes_ops aes256_ops = { static struct aes_ops aes256_ops = {
.encrypt = aes_sparc64_encrypt_256, .encrypt = aes_sparc64_encrypt_256,
.decrypt = aes_sparc64_decrypt_256, .decrypt = aes_sparc64_decrypt_256,
.load_encrypt_keys = aes_sparc64_load_encrypt_keys_256, .load_encrypt_keys = aes_sparc64_load_encrypt_keys_256,

8
arch/sparc/include/asm/atomic_32.h
View File

@ -20,11 +20,11 @@
#define ATOMIC_INIT(i) { (i) } #define ATOMIC_INIT(i) { (i) }
extern int __atomic_add_return(int, atomic_t *); int __atomic_add_return(int, atomic_t *);
extern int atomic_cmpxchg(atomic_t *, int, int); int atomic_cmpxchg(atomic_t *, int, int);
#define atomic_xchg(v, new) (xchg(&((v)->counter), new)) #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
extern int __atomic_add_unless(atomic_t *, int, int); int __atomic_add_unless(atomic_t *, int, int);
extern void atomic_set(atomic_t *, int); void atomic_set(atomic_t *, int);
#define atomic_read(v) (*(volatile int *)&(v)->counter) #define atomic_read(v) (*(volatile int *)&(v)->counter)

18
arch/sparc/include/asm/atomic_64.h
View File

@ -20,15 +20,15 @@
#define atomic_set(v, i) (((v)->counter) = i) #define atomic_set(v, i) (((v)->counter) = i)
#define atomic64_set(v, i) (((v)->counter) = i) #define atomic64_set(v, i) (((v)->counter) = i)
extern void atomic_add(int, atomic_t *); void atomic_add(int, atomic_t *);
extern void atomic64_add(long, atomic64_t *); void atomic64_add(long, atomic64_t *);
extern void atomic_sub(int, atomic_t *); void atomic_sub(int, atomic_t *);
extern void atomic64_sub(long, atomic64_t *); void atomic64_sub(long, atomic64_t *);
extern int atomic_add_ret(int, atomic_t *); int atomic_add_ret(int, atomic_t *);
extern long atomic64_add_ret(long, atomic64_t *); long atomic64_add_ret(long, atomic64_t *);
extern int atomic_sub_ret(int, atomic_t *); int atomic_sub_ret(int, atomic_t *);
extern long atomic64_sub_ret(long, atomic64_t *); long atomic64_sub_ret(long, atomic64_t *);
#define atomic_dec_return(v) atomic_sub_ret(1, v) #define atomic_dec_return(v) atomic_sub_ret(1, v)
#define atomic64_dec_return(v) atomic64_sub_ret(1, v) #define atomic64_dec_return(v) atomic64_sub_ret(1, v)
@ -107,6 +107,6 @@ static inline long atomic64_add_unless(atomic64_t *v, long a, long u)
#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
extern long atomic64_dec_if_positive(atomic64_t *v); long atomic64_dec_if_positive(atomic64_t *v);
#endif /* !(__ARCH_SPARC64_ATOMIC__) */ #endif /* !(__ARCH_SPARC64_ATOMIC__) */

7
arch/sparc/include/asm/auxio.h
View File

@ -1,5 +1,12 @@
#ifndef ___ASM_SPARC_AUXIO_H #ifndef ___ASM_SPARC_AUXIO_H
#define ___ASM_SPARC_AUXIO_H #define ___ASM_SPARC_AUXIO_H
#ifndef __ASSEMBLY__
extern void __iomem *auxio_register;
#endif /* ifndef __ASSEMBLY__ */
#if defined(__sparc__) && defined(__arch64__) #if defined(__sparc__) && defined(__arch64__)
#include <asm/auxio_64.h> #include <asm/auxio_64.h>
#else #else

6
arch/sparc/include/asm/auxio_32.h
View File

@ -34,8 +34,8 @@
* NOTE: these routines are implementation dependent-- * NOTE: these routines are implementation dependent--
* understand the hardware you are querying! * understand the hardware you are querying!
*/ */
extern void set_auxio(unsigned char bits_on, unsigned char bits_off); void set_auxio(unsigned char bits_on, unsigned char bits_off);
extern unsigned char get_auxio(void); /* .../asm/floppy.h */ unsigned char get_auxio(void); /* .../asm/floppy.h */
/* /*
* The following routines are provided for driver-compatibility * The following routines are provided for driver-compatibility
@ -78,7 +78,7 @@ do { \
/* AUXIO2 (Power Off Control) */ /* AUXIO2 (Power Off Control) */
extern __volatile__ unsigned char * auxio_power_register; extern volatile u8 __iomem *auxio_power_register;
#define AUXIO_POWER_DETECT_FAILURE 32 #define AUXIO_POWER_DETECT_FAILURE 32
#define AUXIO_POWER_CLEAR_FAILURE 2 #define AUXIO_POWER_CLEAR_FAILURE 2

6
arch/sparc/include/asm/auxio_64.h
View File

@ -75,8 +75,6 @@
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
extern void __iomem *auxio_register;
#define AUXIO_LTE_ON 1 #define AUXIO_LTE_ON 1
#define AUXIO_LTE_OFF 0 #define AUXIO_LTE_OFF 0
@ -84,7 +82,7 @@ extern void __iomem *auxio_register;
* *
* on - AUXIO_LTE_ON or AUXIO_LTE_OFF * on - AUXIO_LTE_ON or AUXIO_LTE_OFF
*/ */
extern void auxio_set_lte(int on); void auxio_set_lte(int on);
#define AUXIO_LED_ON 1 #define AUXIO_LED_ON 1
#define AUXIO_LED_OFF 0 #define AUXIO_LED_OFF 0
@ -93,7 +91,7 @@ extern void auxio_set_lte(int on);
* *
* on - AUXIO_LED_ON or AUXIO_LED_OFF * on - AUXIO_LED_ON or AUXIO_LED_OFF
*/ */
extern void auxio_set_led(int on); void auxio_set_led(int on);
#endif /* ifndef __ASSEMBLY__ */ #endif /* ifndef __ASSEMBLY__ */

6
arch/sparc/include/asm/bitext.h
View File

@ -20,8 +20,8 @@ struct bit_map {
int num_colors; int num_colors;
}; };
extern int bit_map_string_get(struct bit_map *t, int len, int align); int bit_map_string_get(struct bit_map *t, int len, int align);
extern void bit_map_clear(struct bit_map *t, int offset, int len); void bit_map_clear(struct bit_map *t, int offset, int len);
extern void bit_map_init(struct bit_map *t, unsigned long *map, int size); void bit_map_init(struct bit_map *t, unsigned long *map, int size);
#endif /* defined(_SPARC_BITEXT_H) */ #endif /* defined(_SPARC_BITEXT_H) */

6
arch/sparc/include/asm/bitops_32.h
View File

@ -18,9 +18,9 @@
#error only <linux/bitops.h> can be included directly #error only <linux/bitops.h> can be included directly
#endif #endif
extern unsigned long ___set_bit(unsigned long *addr, unsigned long mask); unsigned long ___set_bit(unsigned long *addr, unsigned long mask);
extern unsigned long ___clear_bit(unsigned long *addr, unsigned long mask); unsigned long ___clear_bit(unsigned long *addr, unsigned long mask);
extern unsigned long ___change_bit(unsigned long *addr, unsigned long mask); unsigned long ___change_bit(unsigned long *addr, unsigned long mask);
/* /*
* Set bit 'nr' in 32-bit quantity at address 'addr' where bit '0' * Set bit 'nr' in 32-bit quantity at address 'addr' where bit '0'

24
arch/sparc/include/asm/bitops_64.h
View File

@ -15,12 +15,12 @@
#include <asm/byteorder.h> #include <asm/byteorder.h>
#include <asm/barrier.h> #include <asm/barrier.h>
extern int test_and_set_bit(unsigned long nr, volatile unsigned long *addr); int test_and_set_bit(unsigned long nr, volatile unsigned long *addr);
extern int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr); int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr);
extern int test_and_change_bit(unsigned long nr, volatile unsigned long *addr); int test_and_change_bit(unsigned long nr, volatile unsigned long *addr);
extern void set_bit(unsigned long nr, volatile unsigned long *addr); void set_bit(unsigned long nr, volatile unsigned long *addr);
extern void clear_bit(unsigned long nr, volatile unsigned long *addr); void clear_bit(unsigned long nr, volatile unsigned long *addr);
extern void change_bit(unsigned long nr, volatile unsigned long *addr); void change_bit(unsigned long nr, volatile unsigned long *addr);
#include <asm-generic/bitops/non-atomic.h> #include <asm-generic/bitops/non-atomic.h>
@ -30,8 +30,8 @@ extern void change_bit(unsigned long nr, volatile unsigned long *addr);
#ifdef __KERNEL__ #ifdef __KERNEL__
extern int ffs(int x); int ffs(int x);
extern unsigned long __ffs(unsigned long); unsigned long __ffs(unsigned long);
#include <asm-generic/bitops/ffz.h> #include <asm-generic/bitops/ffz.h>
#include <asm-generic/bitops/sched.h> #include <asm-generic/bitops/sched.h>
@ -41,10 +41,10 @@ extern unsigned long __ffs(unsigned long);
* of bits set) of a N-bit word * of bits set) of a N-bit word
*/ */
extern unsigned long __arch_hweight64(__u64 w); unsigned long __arch_hweight64(__u64 w);
extern unsigned int __arch_hweight32(unsigned int w); unsigned int __arch_hweight32(unsigned int w);
extern unsigned int __arch_hweight16(unsigned int w); unsigned int __arch_hweight16(unsigned int w);
extern unsigned int __arch_hweight8(unsigned int w); unsigned int __arch_hweight8(unsigned int w);
#include <asm-generic/bitops/const_hweight.h> #include <asm-generic/bitops/const_hweight.h>
#include <asm-generic/bitops/lock.h> #include <asm-generic/bitops/lock.h>

2
arch/sparc/include/asm/btext.h
View File

@ -1,6 +1,6 @@
#ifndef _SPARC_BTEXT_H #ifndef _SPARC_BTEXT_H
#define _SPARC_BTEXT_H #define _SPARC_BTEXT_H
extern int btext_find_display(void); int btext_find_display(void);
#endif /* _SPARC_BTEXT_H */ #endif /* _SPARC_BTEXT_H */

4
arch/sparc/include/asm/bug.h
View File

@ -5,7 +5,7 @@
#include <linux/compiler.h> #include <linux/compiler.h>
#ifdef CONFIG_DEBUG_BUGVERBOSE #ifdef CONFIG_DEBUG_BUGVERBOSE
extern void do_BUG(const char *file, int line); void do_BUG(const char *file, int line);
#define BUG() do { \ #define BUG() do { \
do_BUG(__FILE__, __LINE__); \ do_BUG(__FILE__, __LINE__); \
__builtin_trap(); \ __builtin_trap(); \
@ -20,6 +20,6 @@ extern void do_BUG(const char *file, int line);
#include <asm-generic/bug.h> #include <asm-generic/bug.h>
struct pt_regs; struct pt_regs;
extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noreturn)); void __noreturn die_if_kernel(char *str, struct pt_regs *regs);
#endif #endif

8
arch/sparc/include/asm/cacheflush_32.h
View File

@ -36,7 +36,7 @@
#define flush_page_for_dma(addr) \ #define flush_page_for_dma(addr) \
sparc32_cachetlb_ops->page_for_dma(addr) sparc32_cachetlb_ops->page_for_dma(addr)
extern void sparc_flush_page_to_ram(struct page *page); void sparc_flush_page_to_ram(struct page *page);
#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
#define flush_dcache_page(page) sparc_flush_page_to_ram(page) #define flush_dcache_page(page) sparc_flush_page_to_ram(page)
@ -51,8 +51,8 @@ extern void sparc_flush_page_to_ram(struct page *page);
* way the windows are all clean for the next process and the stack * way the windows are all clean for the next process and the stack
* frames are up to date. * frames are up to date.
*/ */
extern void flush_user_windows(void); void flush_user_windows(void);
extern void kill_user_windows(void); void kill_user_windows(void);
extern void flushw_all(void); void flushw_all(void);
#endif /* _SPARC_CACHEFLUSH_H */ #endif /* _SPARC_CACHEFLUSH_H */

20
arch/sparc/include/asm/cacheflush_64.h
View File

@ -10,7 +10,7 @@
/* Cache flush operations. */ /* Cache flush operations. */
#define flushw_all() __asm__ __volatile__("flushw") #define flushw_all() __asm__ __volatile__("flushw")
extern void __flushw_user(void); void __flushw_user(void);
#define flushw_user() __flushw_user() #define flushw_user() __flushw_user()
#define flush_user_windows flushw_user #define flush_user_windows flushw_user
@ -30,27 +30,27 @@ extern void __flushw_user(void);
* use block commit stores (which invalidate icache lines) during * use block commit stores (which invalidate icache lines) during
* module load, so we need this. * module load, so we need this.
*/ */
extern void flush_icache_range(unsigned long start, unsigned long end); void flush_icache_range(unsigned long start, unsigned long end);
extern void __flush_icache_page(unsigned long); void __flush_icache_page(unsigned long);
extern void __flush_dcache_page(void *addr, int flush_icache); void __flush_dcache_page(void *addr, int flush_icache);
extern void flush_dcache_page_impl(struct page *page); void flush_dcache_page_impl(struct page *page);
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
extern void smp_flush_dcache_page_impl(struct page *page, int cpu); void smp_flush_dcache_page_impl(struct page *page, int cpu);
extern void flush_dcache_page_all(struct mm_struct *mm, struct page *page); void flush_dcache_page_all(struct mm_struct *mm, struct page *page);
#else #else
#define smp_flush_dcache_page_impl(page,cpu) flush_dcache_page_impl(page) #define smp_flush_dcache_page_impl(page,cpu) flush_dcache_page_impl(page)
#define flush_dcache_page_all(mm,page) flush_dcache_page_impl(page) #define flush_dcache_page_all(mm,page) flush_dcache_page_impl(page)
#endif #endif
extern void __flush_dcache_range(unsigned long start, unsigned long end); void __flush_dcache_range(unsigned long start, unsigned long end);
#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
extern void flush_dcache_page(struct page *page); void flush_dcache_page(struct page *page);
#define flush_icache_page(vma, pg) do { } while(0) #define flush_icache_page(vma, pg) do { } while(0)
#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) #define flush_icache_user_range(vma,pg,adr,len) do { } while (0)
extern void flush_ptrace_access(struct vm_area_struct *, struct page *, void flush_ptrace_access(struct vm_area_struct *, struct page *,
unsigned long uaddr, void *kaddr, unsigned long uaddr, void *kaddr,
unsigned long len, int write); unsigned long len, int write);

4
arch/sparc/include/asm/checksum_32.h
View File

@ -29,7 +29,7 @@
* *
* it's best to have buff aligned on a 32-bit boundary * it's best to have buff aligned on a 32-bit boundary
*/ */
extern __wsum csum_partial(const void *buff, int len, __wsum sum); __wsum csum_partial(const void *buff, int len, __wsum sum);
/* the same as csum_partial, but copies from fs:src while it /* the same as csum_partial, but copies from fs:src while it
* checksums * checksums
@ -38,7 +38,7 @@ extern __wsum csum_partial(const void *buff, int len, __wsum sum);
* better 64-bit) boundary * better 64-bit) boundary
*/ */
extern unsigned int __csum_partial_copy_sparc_generic (const unsigned char *, unsigned char *); unsigned int __csum_partial_copy_sparc_generic (const unsigned char *, unsigned char *);
static inline __wsum static inline __wsum
csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum) csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum)

10
arch/sparc/include/asm/checksum_64.h
View File

@ -29,7 +29,7 @@
* *
* it's best to have buff aligned on a 32-bit boundary * it's best to have buff aligned on a 32-bit boundary
*/ */
extern __wsum csum_partial(const void * buff, int len, __wsum sum); __wsum csum_partial(const void * buff, int len, __wsum sum);
/* the same as csum_partial, but copies from user space while it /* the same as csum_partial, but copies from user space while it
* checksums * checksums
@ -37,10 +37,10 @@ extern __wsum csum_partial(const void * buff, int len, __wsum sum);
* here even more important to align src and dst on a 32-bit (or even * here even more important to align src and dst on a 32-bit (or even
* better 64-bit) boundary * better 64-bit) boundary
*/ */
extern __wsum csum_partial_copy_nocheck(const void *src, void *dst, __wsum csum_partial_copy_nocheck(const void *src, void *dst,
int len, __wsum sum); int len, __wsum sum);
extern long __csum_partial_copy_from_user(const void __user *src, long __csum_partial_copy_from_user(const void __user *src,
void *dst, int len, void *dst, int len,
__wsum sum); __wsum sum);
@ -59,7 +59,7 @@ csum_partial_copy_from_user(const void __user *src,
* Copy and checksum to user * Copy and checksum to user
*/ */
#define HAVE_CSUM_COPY_USER #define HAVE_CSUM_COPY_USER
extern long __csum_partial_copy_to_user(const void *src, long __csum_partial_copy_to_user(const void *src,
void __user *dst, int len, void __user *dst, int len,
__wsum sum); __wsum sum);
@ -77,7 +77,7 @@ csum_and_copy_to_user(const void *src,
/* ihl is always 5 or greater, almost always is 5, and iph is word aligned /* ihl is always 5 or greater, almost always is 5, and iph is word aligned
* the majority of the time. * the majority of the time.
*/ */
extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl); __sum16 ip_fast_csum(const void *iph, unsigned int ihl);
/* Fold a partial checksum without adding pseudo headers. */ /* Fold a partial checksum without adding pseudo headers. */
static inline __sum16 csum_fold(__wsum sum) static inline __sum16 csum_fold(__wsum sum)

6
arch/sparc/include/asm/cmpxchg_32.h
View File

@ -20,7 +20,7 @@ static inline unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned lon
return val; return val;
} }
extern void __xchg_called_with_bad_pointer(void); void __xchg_called_with_bad_pointer(void);
static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int size) static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int size)
{ {
@ -45,9 +45,9 @@ static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int
#define __HAVE_ARCH_CMPXCHG 1 #define __HAVE_ARCH_CMPXCHG 1
/* bug catcher for when unsupported size is used - won't link */ /* bug catcher for when unsupported size is used - won't link */
extern void __cmpxchg_called_with_bad_pointer(void); void __cmpxchg_called_with_bad_pointer(void);
/* we only need to support cmpxchg of a u32 on sparc */ /* we only need to support cmpxchg of a u32 on sparc */
extern unsigned long __cmpxchg_u32(volatile u32 *m, u32 old, u32 new_); unsigned long __cmpxchg_u32(volatile u32 *m, u32 old, u32 new_);
/* don't worry...optimizer will get rid of most of this */ /* don't worry...optimizer will get rid of most of this */
static inline unsigned long static inline unsigned long

4
arch/sparc/include/asm/cmpxchg_64.h
View File

@ -42,7 +42,7 @@ static inline unsigned long xchg64(__volatile__ unsigned long *m, unsigned long
#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
extern void __xchg_called_with_bad_pointer(void); void __xchg_called_with_bad_pointer(void);
static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr,
int size) int size)
@ -91,7 +91,7 @@ __cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new)
/* This function doesn't exist, so you'll get a linker error /* This function doesn't exist, so you'll get a linker error
if something tries to do an invalid cmpxchg(). */ if something tries to do an invalid cmpxchg(). */
extern void __cmpxchg_called_with_bad_pointer(void); void __cmpxchg_called_with_bad_pointer(void);
static inline unsigned long static inline unsigned long
__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)

10
arch/sparc/include/asm/cpudata.h
View File

@ -1,5 +1,15 @@
#ifndef ___ASM_SPARC_CPUDATA_H #ifndef ___ASM_SPARC_CPUDATA_H
#define ___ASM_SPARC_CPUDATA_H #define ___ASM_SPARC_CPUDATA_H
#ifndef __ASSEMBLY__
#include <linux/threads.h>
#include <linux/percpu.h>
extern const struct seq_operations cpuinfo_op;
#endif /* !(__ASSEMBLY__) */
#if defined(__sparc__) && defined(__arch64__) #if defined(__sparc__) && defined(__arch64__)
#include <asm/cpudata_64.h> #include <asm/cpudata_64.h>
#else #else

5
arch/sparc/include/asm/cpudata_64.h
View File

@ -8,9 +8,6 @@
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
#include <linux/percpu.h>
#include <linux/threads.h>
typedef struct { typedef struct {
/* Dcache line 1 */ /* Dcache line 1 */
unsigned int __softirq_pending; /* must be 1st, see rtrap.S */ unsigned int __softirq_pending; /* must be 1st, see rtrap.S */
@ -35,8 +32,6 @@ DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data);
#define cpu_data(__cpu) per_cpu(__cpu_data, (__cpu)) #define cpu_data(__cpu) per_cpu(__cpu_data, (__cpu))
#define local_cpu_data() __get_cpu_var(__cpu_data) #define local_cpu_data() __get_cpu_var(__cpu_data)
extern const struct seq_operations cpuinfo_op;
#endif /* !(__ASSEMBLY__) */ #endif /* !(__ASSEMBLY__) */
#include <asm/trap_block.h> #include <asm/trap_block.h>

4
arch/sparc/include/asm/delay_32.h
View File

@ -20,8 +20,8 @@ static inline void __delay(unsigned long loops)
} }
/* This is too messy with inline asm on the Sparc. */ /* This is too messy with inline asm on the Sparc. */
extern void __udelay(unsigned long usecs, unsigned long lpj); void __udelay(unsigned long usecs, unsigned long lpj);
extern void __ndelay(unsigned long nsecs, unsigned long lpj); void __ndelay(unsigned long nsecs, unsigned long lpj);
#ifdef CONFIG_SMP #ifdef CONFIG_SMP
#define __udelay_val cpu_data(smp_processor_id()).udelay_val #define __udelay_val cpu_data(smp_processor_id()).udelay_val

4
arch/sparc/include/asm/delay_64.h
View File

@ -8,8 +8,8 @@
#ifndef __ASSEMBLY__ #ifndef __ASSEMBLY__
extern void __delay(unsigned long loops); void __delay(unsigned long loops);
extern void udelay(unsigned long usecs); void udelay(unsigned long usecs);
#define mdelay(n) udelay((n) * 1000) #define mdelay(n) udelay((n) * 1000)
#endif /* !__ASSEMBLY__ */ #endif /* !__ASSEMBLY__ */

2
arch/sparc/include/asm/device.h
View File

@ -19,7 +19,7 @@ struct dev_archdata {
int numa_node; int numa_node;
}; };
extern void of_propagate_archdata(struct platform_device *bus); void of_propagate_archdata(struct platform_device *bus);
struct pdev_archdata { struct pdev_archdata {
struct resource resource[PROMREG_MAX]; struct resource resource[PROMREG_MAX];

2
arch/sparc/include/asm/dma-mapping.h
View File

@ -7,7 +7,7 @@
#define DMA_ERROR_CODE (~(dma_addr_t)0x0) #define DMA_ERROR_CODE (~(dma_addr_t)0x0)
extern int dma_supported(struct device *dev, u64 mask); int dma_supported(struct device *dev, u64 mask);
#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)

16
arch/sparc/include/asm/ebus_dma.h
View File

@ -22,14 +22,14 @@ struct ebus_dma_info {
unsigned char name[64]; unsigned char name[64];
}; };
extern int ebus_dma_register(struct ebus_dma_info *p); int ebus_dma_register(struct ebus_dma_info *p);
extern int ebus_dma_irq_enable(struct ebus_dma_info *p, int on); int ebus_dma_irq_enable(struct ebus_dma_info *p, int on);
extern void ebus_dma_unregister(struct ebus_dma_info *p); void ebus_dma_unregister(struct ebus_dma_info *p);
extern int ebus_dma_request(struct ebus_dma_info *p, dma_addr_t bus_addr, int ebus_dma_request(struct ebus_dma_info *p, dma_addr_t bus_addr,
size_t len); size_t len);
extern void ebus_dma_prepare(struct ebus_dma_info *p, int write); void ebus_dma_prepare(struct ebus_dma_info *p, int write);
extern unsigned int ebus_dma_residue(struct ebus_dma_info *p); unsigned int ebus_dma_residue(struct ebus_dma_info *p);
extern unsigned int ebus_dma_addr(struct ebus_dma_info *p); unsigned int ebus_dma_addr(struct ebus_dma_info *p);
extern void ebus_dma_enable(struct ebus_dma_info *p, int on); void ebus_dma_enable(struct ebus_dma_info *p, int on);
#endif /* __ASM_SPARC_EBUS_DMA_H */ #endif /* __ASM_SPARC_EBUS_DMA_H */

14
arch/sparc/include/asm/floppy_32.h
View File

@ -9,11 +9,12 @@
#include <linux/of.h> #include <linux/of.h>
#include <linux/of_device.h> #include <linux/of_device.h>
#include <asm/page.h>
#include <asm/pgtable.h> #include <asm/pgtable.h>
#include <asm/idprom.h> #include <asm/idprom.h>
#include <asm/oplib.h> #include <asm/oplib.h>
#include <asm/auxio.h> #include <asm/auxio.h>
#include <asm/setup.h>
#include <asm/page.h>
#include <asm/irq.h> #include <asm/irq.h>
/* We don't need no stinkin' I/O port allocation crap. */ /* We don't need no stinkin' I/O port allocation crap. */
@ -49,7 +50,6 @@ struct sun_flpy_controller {
/* You'll only ever find one controller on a SparcStation anyways. */ /* You'll only ever find one controller on a SparcStation anyways. */
static struct sun_flpy_controller *sun_fdc = NULL; static struct sun_flpy_controller *sun_fdc = NULL;
extern volatile unsigned char *fdc_status;
struct sun_floppy_ops { struct sun_floppy_ops {
unsigned char (*fd_inb)(int port); unsigned char (*fd_inb)(int port);
@ -212,13 +212,6 @@ static void sun_82077_fd_outb(unsigned char value, int port)
* underruns. If non-zero, doing_pdma encodes the direction of * underruns. If non-zero, doing_pdma encodes the direction of
* the transfer for debugging. 1=read 2=write * the transfer for debugging. 1=read 2=write
*/ */
extern char *pdma_vaddr;
extern unsigned long pdma_size;
extern volatile int doing_pdma;
/* This is software state */
extern char *pdma_base;
extern unsigned long pdma_areasize;
/* Common routines to all controller types on the Sparc. */ /* Common routines to all controller types on the Sparc. */
static inline void virtual_dma_init(void) static inline void virtual_dma_init(void)
@ -263,8 +256,7 @@ static inline void sun_fd_enable_dma(void)
pdma_areasize = pdma_size; pdma_areasize = pdma_size;
} }
extern int sparc_floppy_request_irq(unsigned int irq, int sparc_floppy_request_irq(unsigned int irq, irq_handler_t irq_handler);
irq_handler_t irq_handler);
static int sun_fd_request_irq(void) static int sun_fd_request_irq(void)
{ {

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